Refer to the direct-pa" />
參數(shù)資料
型號: MC9S08AW32CFGER
廠商: Freescale Semiconductor
文件頁數(shù): 97/324頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 32K FLASH 44-LQFP
標準包裝: 1,500
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,SCI,SPI
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據轉換器: A/D 8x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 帶卷 (TR)
Chapter 11 Serial Communications Interface (S08SCIV2)
MC9S08AW60 Data Sheet, Rev 2
186
Freescale Semiconductor
Refer to the direct-page register summary in the Memory chapter of this data sheet for the absolute address
assignments for all SCI registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header le is used to translate these names into the appropriate absolute
addresses.
11.2.1
SCI Baud Rate Registers (SCIxBDH, SCIxBHL)
This pair of registers controls the prescale divisor for SCI baud rate generation. To update the 13-bit baud
rate setting [SBR12:SBR0], rst write to SCIxBDH to buffer the high half of the new value and then write
to SCIxBDL. The working value in SCIxBDH does not change until SCIxBDL is written.
SCIxBDL is reset to a non-zero value, so after reset the baud rate generator remains disabled until the rst
time the receiver or transmitter is enabled (RE or TE bits in SCIxC2 are written to 1).
76543210
R
000
SBR12
W
Reset
00000000
= Unimplemented or Reserved
Figure 11-4. SCI Baud Rate Register (SCIxBDH)
Table 11-1. SCIxBDH Register Field Descriptions
Field
Description
4:0
SBR[12:8]
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16
×BR). See also BR bits in Table 11-2.
76543210
R
SBR0
W
Reset
00000100
Figure 11-5. SCI Baud Rate Register (SCIxBDL)
Table 11-2. SCIxBDL Register Field Descriptions
Field
Description
4:0
SBR[12:8]
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16
×BR). See also BR bits in Table 11-1.
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