參數(shù)資料
型號(hào): MC9328MXLCVP15
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
元件分類: 微處理器
英文描述: i.MX Integrated Portable System Processor
中文描述: i.MX處理器集成的便攜式系統(tǒng)
文件頁(yè)數(shù): 2/96頁(yè)
文件大?。?/td> 1495K
代理商: MC9328MXLCVP15
MC9328MX1 Advance Information, Rev. 4
2
Freescale Semiconductor
Introduction
Figure 1. MC9328MX1 Functional Block Diagram
1.1 Conventions
This document uses the following conventions:
OVERBAR is used to indicate a signal that is active when pulled low: for example, RESET.
Logic level one
is a voltage that corresponds to Boolean true (1) state.
Logic level zero
is a voltage that corresponds to Boolean false (0) state.
To
set
a bit or bits means to establish logic level one.
To
clear
a bit or bits means to establish logic level zero.
A
signal
is an electronic construct whose state conveys or changes in state convey information.
A
pin
is an external physical connection. The same pin can be used to connect a number of signals.
Asserted
means that a discrete signal is in active logic state.
Active low
signals change from logic level one to logic level zero.
Active high
signals change from logic level zero to logic level one.
Negated
means that an asserted discrete signal changes logic state.
Active low
signals change from logic level zero to logic level one.
Active high
signals change from logic level one to logic level zero.
LSB means
least significant bit
or
bits
, and MSB means
most significant bit
or
bits
. References to low and
high bytes or words are spelled out.
Numbers preceded by a percent sign (%) are binary. Numbers preceded by a dollar sign ($) or
0x
are
hexadecimal.
Watchdog
GPIO
LCD Controller
JTAG/ICE
CGM
(DPLLx2)
Timer 1 & 2
PWM
Standard
System I/O
Bootstrap
Connectivity
System Control
I2C
MMC/SD
SPI 1 and
SPI 2
UART 1
UART 2 & 3
USB Device
SmartCard I/F
Bluetooth
Accelerator
Memory Stick
Host Controller
SSI/I2S 1 & 2
Analog Signal
Processor
Human Interface
Video Port
Multimedia
Accelerator
Multimedia
Power
Control
RTC
Bus
Control
DMAC
(11 Chnl)
Interrupt
Controller
VMMU
CPU Complex
I Cache
AIPI 1
AIPI 2
D Cache
eSRAM
(128K)
EIM &
SDRAMC
ARM9TDMI
MC9328MX1
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