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參數(shù)資料
| 型號： | MC9328MX21DVG |
| 廠商： | Motorola, Inc. |
| 英文描述： | i.MX family of microprocessors |
| 中文描述： | i.MX系列微處理器 |
| 文件頁數(shù)： | 8/96頁 |
| 文件大?。?/td> | 1495K |
| 代理商： | MC9328MX21DVG |
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MC9328MX1 Advance Information, Rev. 4
8
Freescale Semiconductor
Signals and Connections
TCK
Test Clock to synchronize test logic and control register access through the JTAG port.
TMS
Test Mode Select to sequence the JTAG test controller’s state machine. Sampled on the rising edge
of TCK.
System
BIG_ENDIAN
BIG_ENDIAN—This signal determines the memory endian configuration. BIG_ENDIAN is a static
pin to inner module. If the pin is driven logic-high the memory system is configured into big endian. If
it is driven logic-low the memory system is configured into little endian. The pin is not supposed to
be changed on the fly.
ETM
ETMTRACESYNC
ETM sync signal which is multiplexed with A24. ETMTRACESYNC is selected in ETM mode.
ETMTRACECLK
ETM clock signal which is multiplexed with A23. ETMTRACECLK is selected in ETM mode.
ETMPIPESTAT [2:0]
ETM status signals which are multiplex with A [22:20]. ETMPIPESTAT [2:0] are selected in ETM
mode.
ETMTRACEPKT [7:0]
ETM packet signals which are multiplex with ECB, LBA, BCLK (burst clock), PA17, A [19:16].
ETMTRACEPKT [7:0] are selected in ETM mode.
CMOS Sensor Interface
CSI_D [7:0]
Sensor port data
CSI_MCLK
Sensor port master clock
CSI_VSYNC
Sensor port vertical sync
CSI_HSYNC
Sensor port horizontal sync
CSI_PIXCLK
Sensor port data latch clock
LCD Controller
LD [15:0]
LCD Data Bus—All LCD signals are driven low after reset and when LCD is off.
FLM/VSYNC
Frame Sync or Vsync—This signal also serves as the clock signal output for gate.
driver (dedicated signal SPS for Sharp panel HR-TFT).
LP/HSYNC
Line Pulse or H Sync
LSCLK
Shift Clock
ACD/OE
Alternate Crystal Direction/Output Enable
CONTRAST
This signal is used to control the LCD bias voltage as contrast control.
SPL_SPR
Program horizontal scan direction (Sharp panel dedicated signal).
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
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PDF描述 |
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| MMA6261QR2 | 【1.5g Dual Axis Micromachined Accelerometer |
| MC68HC11F1 | Multiconductor Cable; Number of Conductors:3; Conductor Size AWG:18; No. Strands x Strand Size:41 x 34; Jacket Material:Rubber; Features:Unshielded; Leaded Process Compatible:Yes; Temperature Max:60 C; Voltage Nom.:150V RoHS Compliant: Yes |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MX21DVGR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC9328MX21DVH | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:i.MX family of microprocessors |
| MC9328MX21DVK | 功能描述:處理器 - 專門應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MX21DVK | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MX21DVKR2 | 功能描述:處理器 - 專門應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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