
MC68HC908EY16 MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
169
Chapter 15
Serial Peripheral Interface (SPI) Module
15.1 Introduction
This section describes the serial peripheral interface (SPI) module, which allows full-duplex, synchronous,
serial communications with peripheral devices.
15.2 Features
Features of the SPI module include:
Full-duplex operation
Master and slave modes
Double-buffered operation with separate transmit and receive registers
Four master mode frequencies (maximum = bus frequency
÷ 2)
Maximum slave mode frequency = bus frequency
Serial clock with programmable polarity and phase
Two separately enabled interrupts with CPU service:
–
SPRF (SPI receiver full)
–
SPTE (SPI transmitter empty)
Mode fault error flag with CPU interrupt capability
Overflow error flag with CPU interrupt capability
Programmable wired-OR mode
I2C (inter-integrated circuit) compatibility
15.3 Pin Name and Register Name Conventions
The generic names of the SPI input/output (I/O) pins are:
SS (slave select)
SPSCK (SPI serial clock)
MOSI (master out slave in)
MISO (master in slave out)
The SPI shares four I/O pins with a parallel I/O port. The full name of an SPI pin reflects the name of the
shared port pin.
Table 15-1 shows the full names of the SPI I/O pins. The generic pin names appear in
the text that follows.
Table 15-1. Pin Name Conventions
SPI Generic Pin Name
MISO
MOSI
SS
SPSCK
Full SPI Pin Name
PTC0/MISO
PTC1/MOSI
PTA6/SS
PTA5/SPSCK