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參數(shù)資料
型號: MC8610TPX1066JB
廠商: Freescale Semiconductor
文件頁數(shù): 5/96頁
文件大?。?/td> 0K
描述: MPU E600 CORE 1066MHZ 783-PBGA
標準包裝: 36
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.066GHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 783-BBGA,F(xiàn)CBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
Pin Assignments and Reset States
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
13
Reset Configuration Signals15
LAD[0:31]
cfg_gpinout[0:31]
AA21, AA22, AA23, Y21, Y22, Y23, Y24,
W23, W24, W25, V28, V27, V25, V23, V21,
W22, U28, U26, U24, U22, U23, U20, U21,
W20, V20, T24, T25, T27, T26, T21, T22,
T23
—BVDD
LA10/SSI1_TXD
cfg_ssi_la_sel
P19
BVDD
LA[25:26]
cfg_elbc_clkdiv[0:1]
M23, N23
BVDD
LA27
cfg_cpu_boot
N24
BVDD
DIU_LD[10], LA[28:31]
cfg_sys_pll[0:4]
R6, M26, N20, N21, N22
BVDD
LWE0/LFWE/LBS0
cfg_pci_speed
T19
BVDD
LWE/LBS[1:3]
cfg_host_agt[0:2]
T20, W19, T18
BVDD
LBCTL, LALE,
LGPL2/LOE/LFRE,
DIU_LD4
cfg_core_pll[0:3]
T28, R28, L21, W4
BVDD
LGPL0/LFCLE
cfg_net2_div
L19
BVDD
12
LGPL1/LFALE
cfg_pci_clk
L20
BVDD
LGPL3/LFWP, LGPL5
cfg_boot_seq[0:1]
L22, L24
BVDD
DIU_LD[0]
cfg_elbc_ecc
V6
OVDD
DIU_LD[7:9]
cfg_io_ports[0:2]
U5, T7, R4
OVDD
DIU_LD[11:12]
cfg_dram_type[0:1]
R7, R8
OVDD
DIU_DE, DIU_LD[13:15]
cfg_rom_loc[0:3]
U4, T9, R9, T3
OVDD
DIU_VSYNC
cfg_pci_impd
V7
OVDD
DIU_HSYNC
cfg_pci_arb
U7
OVDD
UART_RTS0
cfg_wdt_en
G26
OVDD
Table 1. Signal Reference by Functional Block (continued)
Name1
Package Pin Number
Pin Type
Power Supply
Notes
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