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| 型號： | MC75174BDWR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LINEDRVR QUAD EIA485 20-SOICW |
| 產(chǎn)品變化通告： | Product Obsolescence 24/Jan/2011 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 線路驅(qū)動器，發(fā)射器 |
| 驅(qū)動器/接收器數(shù)： | 4/0 |
| 規(guī)程： | RS422，RS485 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | MC75174BDWR2GOSCT |
MC75172B, MC75174B
http://onsemi.com
10
Termination Resistors
Transmission line theory states that, in order to preserve
the shape and integrity of a waveform traveling along a
cable, the cable must be terminated in an impedance equal
to its characteristic impedance. In a system such as that
depicted in Figure 18, in which data can travel in both
directions, both physical ends of the cable must be
terminated. Stubs, leading to each receiver and driver,
should be as short as possible.
Leaving off the terminations will generally result in
reflections which can have amplitudes of several volts
above VCC or below ground. These overshoots and
undershoots can disrupt the driver and/or receiver
operation, create false data, and in some cases damage
components on the bus.
Figure 18. Typical EIA485 System
NOTES:
1.Terminating resistors RT must be located at the physical ends of the cable.
2.Stubs should be as short as possible.
3.Circuit ground of all drivers and receivers must be connected via a dedicated wire within the cable.
Do not rely on chassis ground or power line ground.
#8
TTL
R
TTL
#3
TTL
R
En
#2
TTL
En
TTL
R
TTL
#1
R
TTL
RT
#1
En
D
#3
D
#5
D
TTL
En
#6
R
TTL
R
En
#5
R
#6
D
#7
RT
TTL
R
En
TTL
#4
D
5 “off” drivers (@ 0.06 U.L. each),
+8 receivers (@ 1.0 U.L. each) = 8.3 Unit Loads
RT = 120 W at each end of the cable.
#4
D
#2
120
W
Twisted
Pair
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