參數(shù)資料
型號: MC74VHCT32AM
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: QUAD 2 INPUT OR GATE CMOS LOGIC LEVEL SHIFTER
中文描述: AHCT/VHCT SERIES, QUAD 2-INPUT OR GATE, PDSO14
封裝: EIAJ, SO-14
文件頁數(shù): 3/8頁
文件大?。?/td> 150K
代理商: MC74VHCT32AM
MC74VHCT32A
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS
VCC
(V)
TA = 25
°
C
Typ
TA
85
°
C
Min
TA
125
°
C
Min
Symbol
Parameter
Test Conditions
Min
Max
Max
Max
Unit
VIH
Minimum High–Level
Input Voltage
3.0
4.5
5.5
1.2
2.0
2.0
1.2
2.0
2.0
1.2
2.0
2.0
V
VIL
Maximum Low–Level
Input Voltage
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
VOH
Minimum High–Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = –50
μ
A
VIN = VIH or VIL
IOH = –4mA
IOH = –8mA
VIN = VIH or VIL
IOL = 50
μ
A
VIN = VIH or VIL
IOL = 4mA
IOL = 8mA
VIN = 5.5V or GND
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
V
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
VOL
Maximum Low–Level
Output Voltage
VIN = VIH or VIL
3.0
4.5
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Maximum Input
Leakage Current
0 to
5.5
±
0.1
±
1.0
±
1.0
μ
A
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
2.0
20
40
μ
A
ICCT
Quiescent Supply
Current
Input: VIN = 3.4V
5.5
1.35
1.50
1.65
mA
IOPD
Output Leakage
Current
VOUT = 5.5V
0.0
0.5
5.0
10
μ
A
3.8
tPHL
Cin
Maximum Input Capacitance
Delay, A or B to Y
VCC = 5.0
±
0.5V
CL = 15pF
8.0
11.4
1.0
1.0
6.5
13.0
5.5
4
10
10
pF
Typical @ 25
°
C, VCC = 5.0V
22
CPD
Power Dissipation Capacitance (Note 1.)
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR
= CPD VCC fin + ICC/4 (per gate). CPD is used to determine the
no–load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
Figure 1. Switching Waveforms
CL*
*Includes all probe and jig capacitance
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 2. Test Circuit
GND
tPHL
Y
A
tPLH
1.5V
1.5V
3V
VOL
VOH
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