參數(shù)資料
型號: MC74VHCT32A
廠商: ON SEMICONDUCTOR
英文描述: Quad 2 Input OR Gate/CMOS Logic Level Shifter(四2輸入正或門)
中文描述: 四2輸入或門/ CMOS邏輯電平轉(zhuǎn)換器(四2輸入正或門)
文件頁數(shù): 2/6頁
文件大小: 89K
代理商: MC74VHCT32A
MC74VHCT32A
http://onsemi.com
2
3
Y1
1
A1
2
B1
6
Y2
4
A2
5
B2
8
Y3
9
A3
10
B3
11
Y4
12
A4
13
B4
Y = A
B
Figure 1. Pin Connection and Marking Diagram
(Top View)
13
14
12
11
10
9
8
2
1
3
4
5
6
7
V
CC
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
GND
Figure 2. Logic Diagram
Table 1. FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
L
H
H
H
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
NOTE:
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance
circuit. For proper operation, V
in
and V
out
should be constrained to the range GND
always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused outputs must be left open.
Derating
SOIC Packages: – 7 mW/
°
C from 65
°
to 125
°
C
TSSOP Package: 6.1 mW/
°
C from 65
°
to 125
°
C
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
–0.5 to +7.0
V
V
in
DC Input Voltage
–0.5 to +7.0
V
V
out
DC Output Voltage
V
CC
= 0
–0.5 to +7.0
V
TSSOP Package
450
(V
in
or V
out
)
V
CC
. Unused inputs must
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