參數(shù)資料
型號(hào): MC74VHCT138AM
廠商: ON SEMICONDUCTOR
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: 3-to-8 Line Decoder
中文描述: AHCT/VHCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
封裝: EIAJ, SOIC-16
文件頁數(shù): 1/5頁
文件大?。?/td> 124K
代理商: MC74VHCT138AM
Semiconductor Components Industries, LLC, 2000
May, 2000 – Rev. 1
123
Publication Order Number:
MC74VHCT138A/D
MC74VHCT138A
3-to-8 Line Decoder
The MC74VHCT138A is an advanced high speed CMOS 3–to–8
decoder fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
When the device is enabled, three Binary Select inputs (A0 – A2)
determine which one of the outputs (Y0 – Y7) will go Low. When
enable input E3 is held Low or either E2 or E1 is held High, decoding
function is inhibited and all outputs go high. E3, E2, and E1 inputs are
provided to ease cascade connection and for use as an address decoder
for memory systems.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3V to 5.0V, because they
have full 5V CMOS level output swings.
The VHCT138A input structures provide protection when voltages
between 0V and 5.5V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0V. These
input and output structures help prevent device destruction caused by
supply voltage – input/output voltage mismatch, battery backup, hot
insertion, etc.
High Speed: tPD = 7.6ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4A (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5V to 5.5V Operating Range
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 122 FETs or 30.5 Equivalent Gates
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
A0
E1
A2
A1
Y7
E3
E2
GND
Y3
Y2
Y1
Y0
VCC
Y5
Y4
Y6
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC74VHCT138AD
SOIC–16
48 Units/Rail
MC74VHCT138ADR2
SOIC–16 2500 Units/Reel
MC74VHCT138ADT
TSSOP–16
96 Units/Rail
MC74VHCT138ADTR2 TSSOP–16 2500 Units/Reel
MC74VHCT138AM
SOIC
EIAJ–16
48 Units/Rail
MC74VHCT138AMEL
SOIC
EIAJ–16
2000 Units/Reel
SOIC–16
D SUFFIX
CASE 751B
TSSOP–16
DT SUFFIX
CASE 948F
SOIC EIAJ–16
M SUFFIX
CASE 966
1
8
9
16
1
8
16
9
1
16
9
8
VHCT138A
AWLYYWW
MARKING DIAGRAMS
VHCT
138A
AWLYWW
VHCT138A
ALYW
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
A = Assembly Location
L
= Wafer Lot
Y = Year
W = Work Week
A
= Assembly Location
WL = Wafer Lot
Y
= Year
WW = Work Week
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