參數(shù)資料
型號(hào): MC74VHCT08A
廠商: ON SEMICONDUCTOR
英文描述: Quad 2-Input AND Gate
中文描述: 四2輸入與門(mén)
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 143K
代理商: MC74VHCT08A
MC74VHCT08A
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
3
MOTOROLA
b l
di i
tPLH,
tPHL
Input A or B to Y
C, VCC = 5.0V
U i
8.7
12.3
14.0
10.5
17.5
14.0
ns
5.8
7.9
9.0
11.0
Cin
Maximum Input Capacitance
4
10
10
10
pF
CPD
Power Dissipation Capacitance (Note 1.)
1 )
20
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR
)
= CPD VCC fin + ICC/4 (per gate). CPD s used to determine the no–load
dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS
(Input tr = tf = 3.0 ns, CL = 50pF, VCC = 5.0 V)
Symbol
b l
Characteristic
i i
TA = 25
°
C
Typ
U i
Unit
Max
VOLP
VOLV
VIHD
VILD
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
0.3
0.8
V
– 0.3
– 0.8
V
3.5
V
Maximum Low Level Dynamic Input Voltage
1.5
V
Figure 1. Switching Waveforms
Y
A or B
1.5V
tPLH
tPHL
GND
3.0V
1.5V
CL*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
VOH
VOL
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