參數(shù)資料
型號: MC74VHC595M
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: 8-Bit Shift Register with Output Storage Register
中文描述: AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
封裝: EIAJ, SOIC-16
文件頁數(shù): 2/9頁
文件大?。?/td> 206K
代理商: MC74VHC595M
MC74VHC595
MOTOROLA
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
2
FUNCTION TABLE
Operation
Inputs
Resulting Function
Reset
(SCLR)
Serial
Input
(SI)
Shift
Clock
(SCK)
Reg
Clock
(RCK)
Output
Enable
(OE)
Shift
Register
Contents
Storage
Register
Contents
Serial
Output
(SQH)
Parallel
Outputs
(QA – QH)
Clear shift register
L
X
X
L, H,
L, H,
L
L
U
L
U
Shift data into shift register
H
D
L
D
SRA;
SRN
SRN+1
U
U
SRG
SRH
U
Registers remains
unchanged
H
X
L, H,
X
L
**
U
**
Transfer shift register
contents to storage register
H
X
L, H,
L
U
SRN
STRN
*
SRN
Storage register remains
unachanged
X
X
X
L, H,
L
*
U
*
U
Enable parallel outputs
X
X
X
X
L
*
**
*
Enabled
Force outputs into high
impedance state
X
X
X
X
H
*
**
*
Z
SR = shift register contents
STR = storage register contents U = remains unchanged
D = data (L, H) logic level
= High–to–Low
= Low–to–High
* = depends on Reset and Shift Clock inputs
** = depends on Register Clock input
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability. Functional operation under absolute–maximum–rated conditions is not
implied.
Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
Tstg
Storage Temperature
– 20
mA
– 65 to + 150
450
C
mW
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature, All Package Types
Input Rise and Fall Time
2.0
0
0
– 40
0
5.5
5.5
+ 85
V
V
V
C
ns/V
100
0.3V
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
(Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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