參數(shù)資料
型號(hào): MC74VHC1GT126
廠商: ON SEMICONDUCTOR
英文描述: Noninverting Buffer / CMOS Logic Level Shifter(非反相緩沖器)
中文描述: 同相緩沖/ CMOS邏輯電平轉(zhuǎn)換器(非反相緩沖器)
文件頁數(shù): 3/8頁
文件大?。?/td> 104K
代理商: MC74VHC1GT126
MC74VHC1GT126
http://onsemi.com
3
Voltage
Input tr = tf = 3.0 ns
Symbol
Voltage
VIN = VIH or VIL
IOH = – 4 mA
IOH = – 8 mA
Low–Level Output
IOL = 8 mA
Maximum Input
(V)
3.0
5.5
TA = 25
°
C
Typ
0.0
TA
85
°
C
Min
1.4
2.0
0.1
–55
TA
125
°
C
Min
1.4
2.0
Parameter
Voltage
Voltage
Test Conditions
Maximum
Quiescent Supply
Current
5.5
3.0
Min
2.0
Max
0.8
Max
±
1.0
±
Max
Unit
VIH
High–Level Input
IOL = 50
μ
A
Minimum
1.4
3.0
0.53
0.8
0.53
0.8
2.34
0.53
V
VIL
Maximum
3.0
±
0.1
V
4.5
3.0
4.5
V
Current
3.0
2.58
2.48
0.44
0.1
0.52
±
1.0
3.0
μ
A
0.5
0.44
Output Leakage
Maximum 3–State
Leakage Current
Other Input: VCC or GND
5.5
0.25
10
A
Quiescent Supply
5.5
1.50
5.0
5.5
±
tPHL
tPZH
PZH
8.1
3.6
1.0
1.0
13.0
Delay, A to Y
11.5
7.5
13.0
16.0
PHL
Enable TIme,OE to Y
(Fi
4
(Figure 4. and 5.)
±
0.5 V
RL = RI = 500
VCC = 5.0
±
0.5 V
CL = 50pF
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
3.8
5.5
6.5
8.5
1.0
tPHZ
Disable Time,OE to Y
(Fi
(Figure 4. and 5.)
Maximum Output
d 5 )
±
0.3 V
5.1
6.0
7.5
15.0
7.0
1.0
4
Maximum Output
d 5 )
8.8
1.0
10.0
15.0
11.5
12.0
18.0
1.0
Impedance State)
Cin
Maximum Input
4
14
10
10
pF
Maximum Three–State
Output Capacitance
(Output in High
CPD
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR
= CPD VCC fin + ICC/4 (per buffer). CPD is used to determine the
no–load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
Power Dissipation Capacitance (Note 6)
pF
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