參數(shù)資料
型號: MC74LVX139M
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual 2-to-4 Decoder/ Demultiplexer
中文描述: LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
封裝: EIAJ, SOP-16
文件頁數(shù): 1/12頁
文件大小: 161K
代理商: MC74LVX139M
Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 1
1
Publication Order Number:
MC74LVX139/D
MC74LVX139
Dual 2-to-4 Decoder/
Demultiplexer
The MC74LVX139 is an advanced high speed CMOS 2–to–4
decoder/ demultiplexer fabricated with silicon gate CMOS technology.
When the device is enabled (E = low), it can be used for gating or as
a data input for demultiplexing operations. When the enable input is
held high, all four outputs are fixed high, independent of other inputs.
The inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
High Speed: t
PD
= 6.0 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4
μΑ
(Max) at T
A
= 25
°
C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 3.6 V Operating Range
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 100 FETs or 25 Equivalent Gates
FUNCTION TABLE
Inputs
A1
Outputs
Y1 Y2
E
A0
Y0
Y3
H
L
L
L
L
X
L
L
H
H
X
L
H
L
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Ea
A1a
A0a
GND
A1b
A0b
Eb
V
CC
Y0a
Y1a
Y2a
Y3a
Y0b
Y1b
Y2b
Y3b
Figure 1. Pin Assignment
http://onsemi.com
SOIC–16
D SUFFIX
CASE 751B
MARKING DIAGRAMS
1
8
9
16
1
8
16
9
1
16
9
8
LVX139
AWLYYWW
LVX139
AWLYWW
LVX139
ALYW
TSSOP–16
DT SUFFIX
CASE 948F
SOIC EIAJ–16
M SUFFIX
CASE 966
Device
Package
Shipping
ORDERING INFORMATION
MC74LVX139D
SO–16
48 Units/Rail
MC74LVX139DR2
SO–16
2500 Units/Reel
MC74LVX139DT
TSSOP–16
96 Units/Rail
TSSOP–16 2000 Units/Reel
MC74LVX139M
SO EIAJ–16
48 Units/Rail
MC74LVX139MEL
SO EIAJ–16
2000 Units/Reel
MC74LVX139DTR2
A
WL or L
YY or Y
WW or W = Work Week
= Assembly Location
= Wafer Lot
= Year
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