參數資料
型號: MC74LCX14M
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Low Voltage CMOS Hex Schmitt Inverter With 5 V-Tolerant Inputs
中文描述: LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封裝: EIAJ, SO-14
文件頁數: 4/8頁
文件大?。?/td> 85K
代理商: MC74LCX14M
MC74LCX14
http://onsemi.com
4
r
f
Limits
Unit
T
A
= –40
°
C to +85
°
C
V
CC
= 3.3 V
±
0.3 V
V
CC
= 2.7 V
V
CC
= 2.5 V
±
0.2 V
C
L
= 50 pF
C
L
= 50 pF
C
L
= 30 pF
Symbol
Parameter
Waveform
Min
Max
Min
Max
Min
Max
t
PLH
t
PHL
Propagation Delay
Input to Output
1
1.5
1.5
6.5
6.5
1.5
1.5
7.5
7.5
1.5
1.5
7.8
7.8
ns
t
OSHL
t
OSLH
2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t
OSHL
) or LOW–to–HIGH (t
OSLH
); parameter
guaranteed by design.
Output–to–Output Skew
(Note 2.)
1.0
1.0
ns
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25
°
C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
V
OLP
Dynamic LOW Peak Voltage
(Note 3.)
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
=2.5 V, V
IL
= 0 V
0.8
0.6
V
V
OLV
Dynamic LOW Valley Voltage
(Note 3.)
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
= 2.5 V, V
IL
= 0 V
–0.8
–0.6
V
3. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
C
IN
Input Capacitance
V
CC
= 3.3 V, V
I
= 0 V or V
CC
7
pF
C
OUT
Output Capacitance
V
CC
= 3.3 V, V
I
= 0 V or V
CC
8
pF
C
PD
Power Dissipation Capacitance
10 MHz, V
CC
= 3.3 V, V
I
= 0 V or V
CC
25
pF
Figure 3. Switching Waveforms
V
CC
GND
50%
50% V
CC
A
Y
t
PHL
t
PLH
Figure 4. Test Circuit
V
OL
V
OH
PULSE
GENERATOR
R
T
DUT
V
CC
R
L
C
L
C
L
=50 pF at V
CC
= 3.3
(includes jig and probe capacitance)
R
L
= R
1
= 500
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
0.3 V or equivalent
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