參數(shù)資料
型號(hào): MC74HCT244AFG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Octal 3−State Noninverting Buffer/Line Driver/Line Receiver with LSTTL−Compatible Inputs
中文描述: HCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: LEAD FREE, EIAJ, SOIC-20
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 123K
代理商: MC74HCT244AFG
MC74HCT244A
http://onsemi.com
2
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
V
DC Supply Voltage (Referenced to GND)
V
DC Input Voltage (Referenced to GND)
– 0.5 to + 7
– 0.5 to V
+ 0.5
V
V
V
mA
mA
mA
mW
V
DC Output Voltage (Referenced to GND)
I
DC Input Current, per Pin
– 0.5 to V
+ 0.5
I
DC Output Current, per Pin
±
20
±
35
±
75
750
I
DC Supply Current, V
and GND Pins
P
D
Power Dissipation in Still Air,
Plastic DIP
(Plastic DIP, SOIC, SSOP or TSSOP Package)
260
Derating
Plastic DIP: – 10 mW/ C from 65 to 125 C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
in
, V
out
T
A
t
r
, t
f
Semiconductor HighSpeed CMOS Data Book (DL129/D).
2. Total Supply Current = I
CC
+
Σ
I
CC
.
Parameter
Min
4.5
0
– 55
0
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
5.5
V
CC
+ 125
500
V
V
C
ns
V
4.5
2
25 C
55 C
85 C
125 C
V
Minimum HighLevel Input Voltage
IL
V
= 0.1 V or V
– 0.1 V
out
V
out
CC
5.5
Voltage
|I
out
|
20 A
5.4
5.4
5.4
V
out
5.5
4.5
0.26
OL
Voltage
in
IH
IL
|I
|
20 A
0.1
5.5
±
0.1
0.1
0.33
0.1
0.4
|I
out
|
6 mA
I
in
Maximum Input Leakage Current
V
in
= V
CC
or GND
5.5
±
0.5
±
1.0
±
1.0
A
I
OZ
Maximum ThreeState Leakage
Output in HighImpedance State
±
5.0
±
10
A
Current (per Package)
Current
V
in
= V
CC
or GND, Other Inputs
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
相關(guān)PDF資料
PDF描述
MC74HCT244ANG Octal 3−State Noninverting Buffer/Line Driver/Line Receiver with LSTTL−Compatible Inputs
MC74HCT244A Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs(八總線緩沖器(三態(tài)同相輸出))
MC74HCT244ADT Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
MC74HCT244ADTR2 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
MC74HCT244ADW Octal 3-State Noninverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs
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