參數(shù)資料
型號(hào): MC74HC595A
廠商: ON SEMICONDUCTOR
英文描述: 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs(8位串行輸入 串/并輸出移位寄存器(3態(tài)輸出))
中文描述: 8位Serial-Input/Serial或并行輸出移位寄存器和鎖存三態(tài)輸出(8位串行輸入串/并輸出移位寄存器(三態(tài)輸出))
文件頁數(shù): 3/12頁
文件大?。?/td> 121K
代理商: MC74HC595A
MC74HC595A
http://onsemi.com
3
applied to the device are individual stress limit values (not normal operating conditions) and are
not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
V
DC Supply Voltage (Referenced to GND)
V
DC Input Voltage (Referenced to GND)
– 0.5 to + 7.0
– 0.5 to V
+ 0.5
mA
mA
V
V
out
DC Output Voltage (Referenced to GND)
V
I
DC Input Current, per Pin
– 0.5 to V
CC
+ 0.5
V
I
out
DC Output Current, per Pin
±
20
I
DC Supply Current, V
and GND Pins
±
35
75
(Plastic DIP, SOIC or TSSOP Package)
SOIC Package
500
mW
Lead Temperature, 1 mm from Case for 10 Seconds
260
C
DC Input Voltage, Output Voltage
(Referenced to GND)
(Figure 1)
V
CC
= 4.5 V
0
500
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
2.0
4.5
6.0
1.8
Guaranteed Limit
V
Symbol
Parameter
Test Conditions
4.5
6.0
6.0
– 55 to 25 C
85 C
3.15
4.2
125 C
Unit
V
IH
Minimum HighLevel Input
Voltage
V
out
= 0.1 V or V
CC
– 0.1 V
2.0
1.35
3.15
4.2
1.5
1.5
3.15
4.2
1.35
1.8
1.5
V
V
IL
Maximum LowLevel Input
Voltage
6.0
V
out
= 0.1 V or V
CC
– 0.1 V
3.0
5.9
5.34
0.5
1.35
1.8
5.9
5.2
0.5
0.5
OH
Minimum HighLevel Output
Voltage, Q
in
= V
IH
or V
IL
|I
5.9
V
= V
or V
|I
|
out
|I
|
2.4 mA
2.48
2.34
2.2
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
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