參數(shù)資料
型號: MC74HC4851ADWR2
廠商: ON SEMICONDUCTOR
元件分類: 運動控制電子
英文描述: 3-Terminal 0.1A Positive Voltage Regulator; Package: TO-92R; No of Pins: 3; Container: Ammo
中文描述: 8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
封裝: SOIC-16
文件頁數(shù): 3/12頁
文件大小: 294K
代理商: MC74HC4851ADWR2
MC74HC4851A, MC74HC4852A
http://onsemi.com
3
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
±
25
V
I
DC Current, Into or Out of Any Pin
SOIC Package
500
Plastic DIP, SOIC or TSSOP Package
Lead Temperature, 1 mm from Case for 10 Seconds
260
C
RECOMMENDED OPERATING CONDITIONS
drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
Symbol
Parameter
Min
Max
6.0
VCC
1.2
+ 125
1000
400
Unit
VCC
Vin
VIO*
TA
Positive DC Supply Voltage
DC Input Voltage (Any Pin)
Static or Dynamic Voltage Across Switch
Operating Temperature Range, All Package Types
(Referenced to GND)
2.0
GND
0.0
– 55
0
V
(Referenced to GND)
V
V
C
tr, tf
Input Rise/Fall Time
VCC = 6.0 V
0
0
ns
DC CHARACTERISTICS
Digital Section
(Voltages Referenced to GND) VEE = GND, Except Where Noted
VCC
V
Guaranteed Limit
Symbol
Parameter
Condition
–55 to 25
°
C
85
°
C
125
°
C
Unit
VIH
Minimum High–Level Input
Voltage, Channel–Select or Enable
Inputs
Ron = Per Spec
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
VIL
Maximum Low–Level Input
Voltage, Channel–Select or Enable
Inputs
Ron = Per Spec
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
Iin
Maximum Input Leakage Current
on Digital Pins (Enable/A/B/C)
Vin = VCC or GND
6.0
±
0.1
±
1.0
±
1.0
μ
A
ICC
Maximum Quiescent Supply
Current (per Package)
Vin(digital) = VCC or GND
Vin(analog) = GND
6.0
2
20
40
μ
A
NOTE:Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
(Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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