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參數(shù)資料
| 型號(hào)： | MC74HC42 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 1-of-10 Decoder High-Performance Silicon-Gate CMOS |
| 中文描述： | 1 - 10解碼器高性能硅柵CMOS |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大小： | 90K |
| 代理商： | MC74HC42 |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
SOIC Package
Tstg
TL
Storage Temperature
500
– 65 to + 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
C
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Input Rise and Fall Time
(Figure 1)
0
0
1000
500
ns
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
VCC = 4.5 V
Guaranteed Limit
Voltage
|Iout|
20
μ
A
4.5
3.15
3.15
3.15
6.0
1.2
1.2
1.2
VOH
Minimum High–Level Output
Voltage
Vin = VIH or VIL
|Iout|
20
μ
A
2.0
4.5
1.9
4.4
1.9
4.4
1.9
4.4
5.2 mA
5.48
5.34
5.20
V
VOL
Maximum Low–Level Output
Vin = VIH or VIL
|Iout|
6.0
2.0
0.1
0.1
0.1
5.2 mA
0.26
0.33
0.40
V
Iin
ICC
Maximum Input Leakage Current
Maximum Quiescent Supply
Vin = VCC or GND
Vin = VCC or GND
|Iout|
6.0
6.0
6.0
±
0.1
8
±
1.0
±
1.0
160
μ
A
μ
A
80
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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