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參數(shù)資料
| 型號(hào)： | MC74HC14AN |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Hex Schmitt-Trigger Inverter |
| 中文描述： | HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 138K |
| 代理商： | MC74HC14AN |
MC74HC14A
http://onsemi.com
4
AC CHARACTERISTICS
(CL = 50pF, Input tr = tf = 6ns)
VCC
V
Guaranteed Limit
Symbol
Parameter
–55 to 25
°
C
≤
85
°
C
≤
125
°
C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
Cin
Maximum Input Capacitance
10
10
10
pF
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
22
CPD
Power Dissipation Capacitance (Per Inverter)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
ON Semiconductor High–Speed CMOS Data Book (DL129/D).
pF
Figure 1. Switching Waveforms
GND
VCC
OUTPUT Y
INPUT A
CL*
*Includes all probe and jig capacitance
TEST
POINT
90%
50%
10%
tTLH
DEVICE
UNDER
TEST
OUTPUT
Figure 2. Test Circuit
tTHL
90%
50%
10%
tPLH
tPHL
tf
tr
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