參數(shù)資料
型號: MC74HC138A
廠商: ON SEMICONDUCTOR
英文描述: 1 of 8 Decoder/Demultiplexer(3-8線譯碼器)
中文描述: 1月8解碼器/多路解復(fù)用器(3-8線譯碼器)
文件頁數(shù): 3/10頁
文件大?。?/td> 116K
代理商: MC74HC138A
MC74HC138A
http://onsemi.com
3
applied to the device are individual stress limit values (not normal operating conditions) and are not
valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Derating
Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: 6.1 .W/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
V
DC Supply Voltage (Referenced to GND)
V
DC Input Voltage (Referenced to GND)
– 0.5 to + 7.0
– 0.5 to V
+ 0.5
V
V
V
mA
mA
mA
mW
V
DC Output Voltage (Referenced to GND)
I
DC Input Current, per Pin
– 0.5 to V
+ 0.5
I
DC Output Current, per Pin
20
±
25
±
50
750
500
I
DC Supply Current, V
and GND Pins
P
Power Dissipation in Still Air,
Plastic DIP
SOIC Package
(Plastic DIP, SOIC or TSSOP Package)
in
out
4.0 mA
3.0
CC
A
CC
r
f
CC
V
CC
= 6.0 V
0
400
|I
out
|
20 A
CC
Voltage
2.0
3.0
6.0
1.8
2.1
2.1
2.1
V
Maximum LowLevel Input
Voltage
V
= 0.1 V or V
– 0.1 V
|I
out
|
20 A
2.0
5.9
0.5
0.9
0.5
0.9
1.8
0.5
0.9
1.8
V
V
Minimum HighLevel Output
V
in
= V
IH
or V
IL
out
1.9
1.9
1.9
V
V
= V
or V
|I
|
|I
|
out
3.0
4.5
2.48
3.98
2.34
3.84
2.20
3.70
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
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