參數(shù)資料
型號: MC74AC373DWG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Octal Transparent Latch with 3−State Outputs
中文描述: AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: LEAD FREE, SOIC-20
文件頁數(shù): 11/12頁
文件大?。?/td> 127K
代理商: MC74AC373DWG
MC74AC373, MC74ACT373
http://onsemi.com
11
PACKAGE DIMENSIONS
TSSOP20
DT SUFFIX
CASE 948E02
ISSUE C
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MIN
6.40
MAX
6.60
4.50
1.20
0.15
0.75
MIN
0.252
MAX
0.260
0.177
0.047
0.006
0.030
INCHES
MILLIMETERS
4.30
0.169
0.05
0.50
0.65 BSC
0.27
0.09
0.09
0.19
0.19
6.40 BSC
0
0.002
0.020
0.026 BSC
0.011
0.004
0.004
0.007
0.007
0.252 BSC
0
0.37
0.20
0.16
0.30
0.25
0.015
0.008
0.006
0.012
0.010
8
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION:
MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE W.
íííí
íííí
íííí
SECTION NN
1
10
11
20
PIN 1
A
B
T
0.100 (0.004)
C
D
G
H
K
J J1
N
N
M
F
W
SEATING
PLANE
V
U
S
U
M
0.10 (0.004)
V
S
T
20X REF
L
L/2
2X
S
U
0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
S
U
0.15 (0.006) T
7.06
0.36
16X
1.26
0.65
PITCH
DIMENSIONS: MILLIMETERS
1
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
相關(guān)PDF資料
PDF描述
MC74AC373DWR2 Octal Transparent Latch with 3−State Outputs
MC74AC373DWR2G Octal Transparent Latch with 3−State Outputs
MC74AC373MEL Octal Transparent Latch with 3−State Outputs
MC74AC373MELG Octal Transparent Latch with 3−State Outputs
MC74AC373NG Octal Transparent Latch with 3−State Outputs
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