參數(shù)資料
型號: MC74AC257DR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Quad 2−Input Multiplexer with 3−State Outputs
中文描述: AC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 2/12頁
文件大?。?/td> 191K
代理商: MC74AC257DR2
MC74AC257, MC74ACT257
http://onsemi.com
2
PIN NAME
PIN
FUNCTION
S
Common Data Select Input
OE
3
State Output Enable Input
I
0a
I
0d
Data Inputs from Source 0
I
1a
I
1d
Data Inputs from Source 1
Z
a
Z
d
3
State Multiplexer Outputs
TRUTH TABLE
Output
Enable
Select
Input
Data
Inputs
Outputs
OE
S
I
0
I
1
Z
H
L
L
L
L
X
H
H
L
L
X
X
X
L
H
X
L
H
X
X
Z
L
H
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Figure 2. Logic Symbol
S
OE I
0a
I
1a
I
0b
I
1b
Z
b
I
0c
I
1c
I
0d
I
1d
Z
a
Z
c
Z
d
FUNCTIONAL DESCRIPTION
The MC74AC257/74ACT257 is a quad 2
input
multiplexer with 3
state outputs. It selects four bits of data
from two sources under control of a Common Data Select
input. When the Select input is LOW, the I
0x
inputs are
selected and when Select is HIGH, the I
1x
inputs are
selected. The data on the selected inputs appears at the
outputs in true (noninverted) form. The device is the logic
implementation of a 4
pole, 2
position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
Z
a
= OE
(I
1a
S+I
0a
S)
Z
b
= OE
(I
1b
S+I
0b
S)
Z
c
= OE
(I
1c
S+I
0c
S)
Z
d
= OE
(I
1d
S+I
0d
S)
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to 3
state devices whose outputs are tied together are
designed so there is no overlap.
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