- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383560 > MC74AC109DT (ON SEMICONDUCTOR) Dual JK Positive Edge−Triggered Flip−Flop PDF資料下載
參數(shù)資料
| 型號： | MC74AC109DT |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual JK Positive Edge−Triggered Flip−Flop |
| 中文描述： | AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 242K |
| 代理商： | MC74AC109DT |
MC74AC109, MC74ACT109
http://onsemi.com
4
AC CHARACTERISTICS
(For Figures and Waveforms
See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
Parameter
V
CC
*
(V)
74AC
74AC
Unit
Fig.
No.
T
A
= +25
°
C
C
L
= 50 pF
T
A
=
40
°
C
to +85
°
C
C
L
= 50 pF
Min
Typ
Max
Min
Max
f
max
Maximum Clock
Frequency
3.3
5.0
125
150
100
125
MHz
3
3
t
PLH
Propagation Delay
CP
n
to Q
n
or Q
n
3.3
5.0
4.0
2.5
13.5
10.0
3.5
2.0
16.0
10.5
ns
3
6
t
PHL
Propagation Delay
CP
n
to Q
n
or Q
n
3.3
5.0
3.0
2.0
14.0
10.0
3.0
1.5
14.5
10.5
ns
3
6
t
PLH
Propagation Delay
C
Dn
or S
Dn
to Q
n
or Q
n
3.3
5.0
3.0
2.5
12.0
9.0
2.5
2.0
13.0
10.0
ns
3
6
t
PHL
Propagation Delay
CD
n
or S
Dn
to Q
n
or Q
n
3.3
5.0
3.0
2.0
12.0
9.5
3.0
2.0
13.5
10.5
ns
3
6
*Voltage Range 3.3 V is 3.3 V
±
0.3 V.
*Voltage Range 5.0 V is 5.0 V
±
0.5 V.
AC OPERATING REQUIREMENTS
Symbol
Parameter
V
CC
*
(V)
74AC
74AC
Unit
Fig.
No.
T
A
= +25
°
C
C
L
= 50 pF
T
A
=
40
°
C
to +85
°
C
C
L
= 50 pF
Typ
Guaranteed Minimum
t
s
Set
up Time, HIGH or LOW
J
n
or K
n
to CP
n
Hold Time, HIGH or LOW
J
n
or K
n
to CP
n
Pulse Width
CP
n or
C
Dn
or S
Dn
Recovery TIme
C
Dn
or S
Dn
to CP
3.3
5.0
6.5
4.5
7.5
5.0
ns
3
9
t
h
3.3
5.0
0
0.5
0
0.5
ns
3
9
t
w
3.3
5.0
4.0
3.5
4.5
3.5
ns
3
6
t
rec
3.3
5.0
0
0
0
0
ns
3
9
*Voltage Range 3.3 V is 3.3 V
±
0.3 V.
*Voltage Range 5.0 V is 5.0 V
±
0.5 V.
DC CHARACTERISTICS
Symbol
Parameter
V
CC
(V)
74ACT
74ACT
Unit
Conditions
T
A
= +25
°
C
T
A
=
40
°
C to
+85
°
C
Typ
Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
V
V
OUT
= 0.1 V
or V
CC
0.1 V
V
IL
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
V
V
OUT
= 0.1 V
or V
CC
0.1 V
V
OH
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
V
I
OUT
=
50
μ
A
*V
IN
= V
IL
or V
IH
4.5
5.5
3.86
4.86
3.76
4.76
V
I
OH
24 mA
24 mA
*All outputs loaded; thresholds on input associated with output under test.
Maximum test duration 2.0 ms, one output loaded at a time.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC74AC109DTR2 | Dual JK Positive Edge−Triggered Flip−Flop |
| MC74AC109M | Dual JK Positive Edge−Triggered Flip−Flop |
| MC74AC109MEL | Dual JK Positive Edge−Triggered Flip−Flop |
| MC74ACT109DR2 | Dual JK Positive Edge−Triggered Flip−Flop |
| MC74ACT109DT | Dual JK Positive Edge−Triggered Flip−Flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74AC109DTR2 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74AC109M | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74AC109MEL | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Dual JK Positive Edge−Triggered Flip−Flop |
| MC74AC109N | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74AC10D | 功能描述:邏輯門 2-6V Triple 3-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。