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參數(shù)資料
| 型號： | MC7457RX1000NC |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 10/71頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU RISC 32BIT 483FCCBGA |
| 標準包裝： | 36 |
| 系列： | MPC74xx |
| 處理器類型： | 32-位 MPC74xx PowerPC |
| 速度： | 1.0GHz |
| 電壓： | 1.1V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 483-BCBGA，F(xiàn)CCBGA |
| 供應商設備封裝： | 483-FCCBGA（29x29） |
| 包裝： | 托盤 |
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MPC7457 RISC Microprocessor Hardware Specifications, Rev. 8
Electrical and Thermal Characteristics
Freescale Semiconductor
18
Figure 3 provides the SYSCLK input timing diagram.
Figure 3. SYSCLK Input Timing Diagram
5.2.2
Processor Bus AC Specifications
Table 9 provides the processor bus AC timing specifications for the MPC7457 as defined in Figure 4 and
Figure 5. Timing specifications for the L3 bus are provided in Section 5.2.3, “L3 Clock AC
Internal PLL relock time
—100
μs7
Notes:
1.
Caution: The SYSCLK frequency and PLL_CFG[0:4] settings must be chosen such that the resulting SYSCLK (bus)
frequency, CPU (core) frequency, and PLL (VCO) frequency do not exceed their respective maximum or minimum operating
frequencies. Refer to the PLL_CFG[0:4] signal description in Section 1.9.1, “PLL Configuration,” for valid PLL_CFG[0:4]
settings.
2. Assumes lightly-loaded, single-processor system; see Section 5.2.1, “Clock AC Specifications” for more information.
3. Rise and fall times for the SYSCLK input measured from 0.4 to 1.4 V.
4. Timing is guaranteed by design and characterization.
5. Guaranteed by design.
6. The SYSCLK driver’s closed loop jitter bandwidth should be less than 1.5 MHz at –3 dB.
7. Relock timing is guaranteed by design and characterization. PLL-relock time is the maximum amount of time required for PLL
lock after a stable VDD and SYSCLK are reached during the power-on reset sequence. This specification also applies when
the PLL has been disabled and subsequently re-enabled during sleep mode. Also note that HRESET must be held asserted
for a minimum of 255 bus clocks after the PLL-relock time during the power-on reset sequence.
Table 8. Clock AC Timing Specifications (continued)
At recommended operating conditions. See Table 4.
Characteristic
Symbol
Maximum Processor Core Frequency
Unit
Notes
867 MHz
1000 MHz
1200 MHz
1267 MHz
Min
Max
Min
Max
Min
Max
Min
Max
SYSCLK
VM
CVIH
CVIL
VM = Midpoint Voltage (OVDD/2)
tSYSCLK
tKR
tKF
tKHKL
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| MC7457RX1200PB | 制造商:Freescale Semiconductor 功能描述:A7, 1.35V +50MV/-30MV - Trays |
| MC7457RX1267LB | 制造商:Freescale Semiconductor 功能描述:MPC74XX RISC 32-BIT 0.13UM 1.267GHZ 1.5V/1.8V/2.5V 483-PIN F - Trays |
| MC7457RX1267LC | 功能描述:微處理器 - MPU APOLO7 RV1.2 1.3V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC7457RX1333PB | 制造商:Freescale Semiconductor 功能描述:A7, 1.35V +50MV/-30MV - Trays |
| MC7457RX733NC | 功能描述:IC MPU RISC 32BIT 483FCCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC74xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應商設備封裝:783-FCPBGA（29x29） 包裝:托盤 |
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