參數資料
型號: MC7410VU500LE
廠商: Freescale Semiconductor
文件頁數: 28/56頁
文件大小: 0K
描述: IC MPU RISC 32BIT 360-FCCBGA
標準包裝: 44
系列: MPC74xx
處理器類型: 32-位 MPC74xx PowerPC
速度: 500MHz
電壓: 1.8V
安裝類型: 表面貼裝
封裝/外殼: 360-BCBGA,FCCBGA
供應商設備封裝: 360-FCCBGA(25x25)
包裝: 托盤
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
34
Freescale Semiconductor
System Design Information
7.6 Substrate Capacitors for the MPC7410
Figure 20 shows the connectivity of the substrate capacitor pads for the MPC7410, 360 CBGA and 360 HCTE
packages.
Figure 20. Substrate Bypass Capacitors for the MPC7410
8
System Design Information
This section provides electrical and thermal design recommendations for successful application of the MPC7410.
8.1 PLL Configuration
The MPC7410 PLL is configured by the PLL_CFG[0:3] signals. For a given SYSCLK (bus) frequency, the PLL
configuration signals set the internal CPU and VCO frequency of operation. The PLL configuration for the
MPC7410 is shown in Table 13 for example frequencies. In this example, shaded cells represent settings that, for a
given SYSCLK frequency, result in core and/or VCO frequencies that do not comply with the minimum and
maximum core frequencies listed in Table 8.
Table 13. MPC7410 Microprocessor PLL Configuration
PLL_CFG
[0:3]
Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz)
Bus-to-
Core
Multiplier
Core-to
VCO
Multiplier
Bus
33.3 MHz
Bus
50 MHz
Bus
66.6 MHz
Bus
75 MHz
Bus
83.3 MHz
Bus
100 MHz
Bus
133 MHz
0100
2x
0110
2.5x
2x
1000
3x
2x
400
(800)
1110
3.5x
2x
—350
(700)
465
(930)
1010
4x
2x
—400
(800)
Package
Caps
Value
F
Voltage
Reference
C1-1
0.01
L2OVDD
C1-2
GND
C2-1
0.01
L2OVDD
C2-2
GND
C3-1
0.01
VDD
C3-2
GND
C4-1
0.01
OVDD
C4-2
GND
C5-1
0.01
OVDD
C5-2
GND
C6-1
0.01
VDD
C6-2
GND
A1 CORNER
C1-1
C1-2
C2-1
C2-2
C3-2
C3-1
C4-2
C4-1
C5-2
C5-1
C6-1
C6-2
L1
L2
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