參數(shù)資料
型號(hào): MC68LNC705C9ACFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 176/177頁
文件大?。?/td> 1941K
代理商: MC68LNC705C9ACFN
Serial Communications Interface (SCI)
Advance Information
MC68HC705C9A — Rev. 4.0
98
Serial Communications Interface (SCI)
MOTOROLA
RWU — Receiver Wakeup Enable Bit
This read/write bit puts the receiver in a standby state. Typically, data
transmitted to the receiver clears the RWU bit and returns the receiver
to normal operation. The WAKE bit in SCCR1 determines whether an
idle input or an address mark brings the receiver out of standby state.
Reset clears the RWU bit.
1 = Standby state
0 = Normal operation
SBK — Send Break Bit
Setting this read/write bit continuously transmits break codes in the
form of 10-bit or 11-bit groups of logic 0s. Clearing the SBK bit stops
the break codes and transmits a logic 1 as a start bit. Reset clears the
SBK bit.
1 = Break codes being transmitted
0 = No break codes being transmitted
9.14.4 SCI Status Register
The SCI status register (SCSR), shown in Figure 9-11, contains flags to
signal the following conditions:
Transfer of SCDR data to transmit shift register complete
Transmission complete
Transfer of receive shift register data SCDR complete
Receiver input idle
Noisy data
Framing error
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PDF描述
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