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參數(shù)資料
| 型號(hào)： | MC68HLC908QY1DT |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁(yè)數(shù)： | 171/186頁(yè) |
| 文件大小： | 2583K |
| 代理商： | MC68HLC908QY1DT |
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Keyboard Interrupt Module (KBI)
Wait Mode
MC68HLC908QY/QT Family — Rev. 2
Data Sheet
MOTOROLA
Keyboard Interrupt Module (KBI)
85
9.3.2 Keyboard Initialization
When a keyboard interrupt pin is enabled, it takes time for the internal pullup to
reach a logic 1. Therefore a false interrupt can occur as soon as the pin is enabled.
To prevent a false interrupt on keyboard initialization:
1.
Mask keyboard interrupts by setting the IMASKK bit in the keyboard status
and control register.
2.
Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard
interrupt enable register.
3.
Write to the ACKK bit in the keyboard status and control register to clear any
false interrupts.
4.
Clear the IMASKK bit.
An interrupt signal on an edge-triggered pin can be acknowledged immediately
after enabling the pin. An interrupt signal on an edge- and level-triggered interrupt
pin must be acknowledged after a delay that depends on the external load.
Another way to avoid a false interrupt:
1.
Configure the keyboard pins as outputs by setting the appropriate DDRA
bits in the data direction register A.
2.
Write 1s to the appropriate port A data register bits.
3.
Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard
interrupt enable register.
9.4 Wait Mode
The keyboard module remains active in wait mode. Clearing the IMASKK bit in the
keyboard status and control register enables keyboard interrupt requests to bring
the MCU out of wait mode.
9.5 Stop Mode
The keyboard module remains active in stop mode. Clearing the IMASKK bit in the
keyboard status and control register enables keyboard interrupt requests to bring
the MCU out of stop mode.
9.6 Keyboard Module During Break Interrupts
The system integration module (SIM) controls whether the keyboard interrupt latch
can be cleared during the break state. The BCFE bit in the break flag control
register (BFCR) enables software to clear status bits during the break state.
To allow software to clear the keyboard interrupt latch during a break interrupt,
write a 1 to the BCFE bit. If a latch is cleared during the break state, it remains
cleared when the MCU exits the break state.
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PDF描述 |
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| MC68HLC908QT2CDW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO8 |
| MC68HLC908QT1CP | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDIP8 |
| MC68HLC908QT4CDW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO8 |
| MC68HLC908QY4CDW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
| MC68HLC908QY2DW | 8-BIT, FLASH, 2 MHz, MICROCONTROLLER, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HLC908QY2CDT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QY2CDW | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/ADC - Bulk |
| MC68HLC908QY2CP | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/ADC - Bulk |
| MC68HLC908QY2DW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QY4CDW | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
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