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Timer Interface Module (TIM)
Input/Output Registers
MC68HLC908QY/QT Family — Rev. 2
Data Sheet
MOTOROLA
Timer Interface Module (TIM)
141
14.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value
in the TIM counter. Reading the high byte (TCNTH) latches the contents of the low
byte (TCNTL) into a buffer. Subsequent reads of TCNTH do not affect the latched
TCNTL value until TCNTL is read. Reset clears the TIM counter registers. Setting
the TIM reset bit (TRST) also clears the TIM counter registers.
NOTE:
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by reading
TCNTL before exiting the break interrupt. Otherwise, TCNTL retains the value
latched during the break.
14.9.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter.
When the TIM counter reaches the modulo value, the overflow flag (TOF) becomes
set, and the TIM counter resumes counting from $0000 at the next timer clock.
Writing to the high byte (TMODH) inhibits the TOF bit and overflow interrupts until
the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
NOTE:
Reset the TIM counter before writing to the TIM counter modulo registers.
Address: $0021
TCNTH
Bit 7
654321
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
00000000
Address: $0022
TCNTL
Bit 7
654321
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00000000
= Unimplemented
Figure 14-6. TIM Counter Registers (TCNTH:TCNTL)
Address: $0023
TMODH
Bit 7
654321
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
11111111
Address: $0024
TMODL
Bit 7
654321
Bit 0
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset:
11111111
Figure 14-7. TIM Counter Modulo Registers (TMODH:TMODL)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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