參數資料
型號: MC68HC711D3FN3
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: ROM-based high-performance microcontrollers
中文描述: 基于ROM的高性能微控制器
文件頁數: 74/124頁
文件大小: 840K
代理商: MC68HC711D3FN3
SERIAL COMMUNICATIONS INTERFACE
For More Information On This Product,
Go to: www.freescale.com
7-8
TECHNICAL DATA
NF — Noise Error Flag
NF is set if majority sample logic detects anything other than a unanimous decision.
Clear NF by reading SCSR with NF set and then reading SCDR.
0 = Unanimous decision
1 = Noise detected
FE — Framing Error
FE is set when a 0 is detected where a stop bit was expected. Clear the FE flag by
reading SCSR with FE set and then reading SCDR.
0 = Stop bit detected
1 = 0 detected
7.6.5 Baud Rate Register (BAUD)
Use this register to select different baud rates for the SCI system. The SCP[1:0] bits
function as a prescaler for the SCR[2:0] bits. Together, these five bits provide multiple
baud rate combinations for a given crystal frequency. Normally, this register is written
once during initialization. The prescaler is set to its fastest rate by default out of reset,
and can be changed at any time. Refer to
Table 7-1
and
Table 7-2
for normal baud
rate selections.
TCLR — Clear Baud Rate Counters (Test)
RCKB — SCI Baud Rate Clock Check (Test)
SCP1, SCP0 — SCI Baud Rate Prescaler Selects
These two bits select a prescale factor for the SCI baud rate generator that determines
the highest possible baud rate.
SCR[2:0] — SCI Baud Rate Selects
These three bits select receiver and transmitter bit rate based on output from baud rate
prescaler stage.
BAUD
— Baud Rate
$002B
Bit 7
TCLR
0
6
0
0
5
4
3
2
1
Bit 0
SCR0
U
SCP1
0
SCP0
0
RCKB
0
SCR2
U
SCR1
U
RESET:
Table 7-1 Baud Rate Prescale Selects
SCP[1:0]
Divide
Crystal Frequency in MHz
4.0 MHz
(Baud)
(Baud)
62.50 K
125.0 K
20.83 K
41.67 K
15.625 K
31.25 K
4800
9600
Internal Clock
By
1
3
4
13
8.0 MHz
10.0 MHz
(Baud)
156.25 K
52.08 K
38.4 K
12.02 K
12.0 MHz
(Baud)
187.5 K
62.5 K
46.88 K
14.42 K
0 0
0 1
1 0
1 1
F
Freescale Semiconductor, Inc.
n
.
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