參數(shù)資料
型號(hào)： MC68HC16S2CPU25
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 26/104頁(yè)
文件大?。?/td> 640K
代理商： MC68HC16S2CPU25
MOTOROLA
MC68HC16S2
28
MC68HC16S2TS/D
3.6 Chip-Selects
Typical microcontrollers require additional hardware to provide external chip-select and address de-
code signals. The MC68HC16S2 includes 12 programmable chip-selects that can provide 2- to 16-
clock-cycle access to external memory and peripherals. Address block sizes of two Kbytes to one Mbyte
can be selected. However, because ADDR[23:20] = ADDR19 in the CPU16, 512 Kbyte blocks are the
largest usable size. Figure 11 is a functional diagram of a chip-select circuit.
Chip-select assertion can be synchronized with bus control signals to provide output enable, read/write
strobe, or interrupt acknowledge signals. Chip-select logic can also generate DSACK and AVEC signals
internally. Each signal can also be synchronized with the ECLK signal available on ADDR23.
NOTES:
1. Operands in parentheses are ignored by the CPU16 during read cycles.
2. The CPU16 treats misaligned long-word transfers as two misaligned word transfers.
3. Three byte transfer cases occur only as a result of an aligned long word to 8-bit port transfer.
Table 16 Operand Alignment
Current
Cycle
Transfer Case
SIZ1
SIZ0
ADDR0
DSACK1 DSACK0
DATA
[15:8]
DATA
[7:0]
Next
Cycle
1
Byte to 8-bit port (even)
0
1
0
1
0
OP0
(OP0)1
—
2
Byte to 8-bit port (odd)
0
1
0
OP0
(OP0)
—
3
Byte to 16-bit port (even)
0
1
0
1
OP0
(OP0)
—
4
Byte to 16-bit port (odd)
0
1
0
1
(OP0)
OP0
—
5
Word to 8-bit port
(aligned)
1
0
1
0
OP0
(OP1)
2
6
Word to 8-bit port
(misaligned
1
0
1
0
OP0
(OP0)
1
7
Word to 16-bit port
(aligned)
1
0
1
OP0
OP1
—
8
Word to 16-bit port
(misaligned)
1
0
1
0
1
(OP0)
OP0
3
9
Long word to 8-bit port
(aligned)
0
1
0
OP0
(OP1)
13
10
Long word to 8-bit port
(misaligned)2
1
0
1
0
OP0
(OP0)
1
11
Long word to 16-bit port
(aligned)
0
1
OP0
OP1
7
12
Long word to 16-bit port
(misaligned)2
1
0
1
0
1
(OP0)
OP0
3
13
Three byte to 8-bit port3
1
0
OP0
(OP0)
5
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