參數(shù)資料
型號(hào): MC68HC11D3VFU
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: ROM-based high-performance microcontrollers
中文描述: 基于ROM的高性能微控制器
文件頁數(shù): 60/124頁
文件大小: 840K
代理商: MC68HC11D3VFU
RESETS AND INTERRUPTS
5-16
TECHNICAL DATA
Figure 5-3 Interrupt Source Resolution within SCI
5.5 Low-Power Operation
Both STOP and WAIT suspend CPU operation until a reset or interrupt occurs. The
WAIT condition suspends processing and reduces power consumption to an interme-
diate level. The STOP condition turns off all on-chip clocks and reduces power con-
sumption to an absolute minimum while retaining the contents of all 192 bytes of RAM.
5.5.1 WAIT
The WAI opcode places the MCU in the WAIT condition, during which the CPU regis-
ters are stacked and CPU processing is suspended until a qualified interrupt is detect-
ed. The interrupt can be an external IRQ, an XIRQ, or any of the internally generated
interrupts, such as the timer or serial interrupts. The on-chip crystal oscillator remains
active throughout the WAIT standby period.
The reduction of power in the WAIT condition depends on how many internal clock sig-
FLAG
RDRF = 1
Y
N
OR = 1
Y
N
Y
N
TDRE = 1
TC = 1
Y
N
IDLE = 1
Y
N
Y
N
Y
N
Y
N
ILIE = 1
RIE = 1
TIE = 1
BEGIN
RE = 1
Y
N
Y
N
TE = 1
TCIE = 1
Y
N
RE = 1
Y
N
VALID SCI REQUEST
NO
VALID SCI REQUEST
INT SOURCE RES
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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