參數(shù)資料
型號: MC68HC11D3VFN3
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: ROM-based high-performance microcontrollers
中文描述: 基于ROM的高性能微控制器
文件頁數(shù): 90/124頁
文件大?。?/td> 840K
代理商: MC68HC11D3VFN3
TIMING SYSTEM
9-4
TECHNICAL DATA
Figure 9-2 Capture/Compare Block Diagram
9.2 Input Capture
The input capture function records the time an external event occurs by latching the
value of the free-running counter when a selected edge is detected at the associated
timer input pin. Software can store latched values and use them to compute the peri-
odicity and duration of events. For example, by storing the times of successive edges
of an incoming signal, software can determine the period and pulse width of a signal.
To measure period, two successive edges of the same polarity are captured. To mea-
sure pulse width, two alternate polarity edges are captured.
11 CC BLOCK
SYSTEM
CLOCK
16-BIT LATCH CLK
4
5
6
7
8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
PARALLEL PORT
PIN CONTROL
OC1I
OC2I
OC3I
OC4I
I4/O5I
TFLG 1
STATUS
FLAGS
FOC1
FOC2
FOC3
FOC4
FOC5
OC1F
OC2F
OC3F
OC4F
I4/O5F
PA3
PA4
PA5
PA6
PA7
OC1
I4/O5
16-BIT COMPARATOR =
TOC1
(HI)
TOC1
(LO)
16-BIT COMPARATOR =
TOC2
(HI)
TOC2
(LO)
16-BIT COMPARATOR =
TOC3
(HI)
TOC3
(LO)
16-BIT COMPARATOR =
TOC4
(HI)
TOC4
(LO)
16-BIT COMPARATOR =
TI4/O5
(HI)
TI4/O5
(LO)
16-BIT FREE RUNNING
COUNTER
TCNT
(HI)
TCNT
(LO)
9
TOI
TOF
INTERRUPT REQUESTS
PRESCALER — DIVIDE BY
1, 4, 8, 16
PR1
16-BIT TIMER BUS
OC5
IC4
INTERRUPT
ENABLES
CFORC
FORCE OUTPUT
COMPARE
PIN
FUNCTIONS
PA0
IC3
3
2
1
BIT 2
BIT 1
BIT 3
IC1I
IC2I
IC3I
IC1F
IC2F
IC3F
PA1
IC2
PA2
IC1
16-BIT LATCH
TIC1
(HI)
TIC1
(LO)
CLK
16-BIT LATCH
TIC2
(HI)
TIC2
(LO)
CLK
16-BIT LATCH
TIC3
(HI)
TIC3
(LO)
CLK
PR0
OC2/OC1
OC3/OC1
OC4/OC1
IC4/OC5
OC1
TMSK 1
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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