參數(shù)資料
型號: MC68HC11D3MFB
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: ROM-based high-performance microcontrollers
中文描述: 基于ROM的高性能微控制器
文件頁數(shù): 69/124頁
文件大?。?/td> 840K
代理商: MC68HC11D3MFB
SERIAL COMMUNICATIONS INTERFACE
For More Information On This Product,
Go to: www.freescale.com
TECHNICAL DATA
7-3
recovery scheme distinguishes valid data from noise in the serial data stream. The
data input is selectively sampled to detect receive data, and a majority voting circuit
determines the value and integrity of each bit.
Figure 7-2 SCI Receiver Block Diagram
11 SCI RX BLOCK
F
N
O
I
R
T
T
SCSR
SCI STATUS 1
S
R
R
T
I
R
T
T
SCCR2
SCI CONTROL 2
W
M
T
R
WAKEUP
LOGIC
RIE
OR
ILIE
IDLE
SCI Tx
REQUESTS
SCI INTERRUPT
REQUEST
INTERNAL
DATA BUS
PIN BUFFER
AND CONTROL
DDD0
PD0
RxD
SCDR
Rx BUFFER
S
(8) 7
6
5
4
3
2
1
0
10 (11) - BIT
Rx SHIFT REGISTER
(READ ONLY)
SCCR1
SCI CONTROL 1
RIE
RDRF
S
MSB
ALL ONES
DATA
RECOVERY
÷16
RWU
RE
M
DISABLE
DRIVER
RECEIVER
BAUD RATE
CLOCK
8
8
8
F
Freescale Semiconductor, Inc.
n
.
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