參數資料
型號: MC68HC11A0CFN2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, 2 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數: 25/158頁
文件大?。?/td> 776K
代理商: MC68HC11A0CFN2
MC68HC11A8
TECHNICAL DATA
SIGNAL DESCRIPTIONS AND OPERATING MODES
MOTOROLA
2-9
2
If the part is not in security mode (or has completed the above erase sequence), a
break character is output by the SCI transmitter. For normal use of the boot loader pro-
gram, the user sends $FF to the SCI receiver at either E clock/16 (7812 baud for E
clock = 2 MHz) or E clock/104 (1200 baud for E clock = 2 MHz).
NOTE
This $FF is not echoed through the SCI transmitter.
Now the user must download 256 bytes of program data to be put into RAM starting
at location $0000. These characters are echoed through the transmitter. When loading
is complete, the program jumps to location $0000 and begins executing that code.
If the SCI transmitter pin is to be used, an external pull-up resistor is required because
port D pins are configured for wire-OR operation.
In special bootstrap operating mode the interrupt vectors are directed to RAM as
shown in
Table 2-3
. This allows the user to use interrupts by way of a jump table. For
example: to use the SWI interrupt, a jump instruction would be placed in RAM at loca-
tions $00F4, $00F5, and $00F6. When an SWI is encountered, the vector (which is in
the boot loader ROM program) will direct program control to location $00F4 in RAM
which in turn contains a JUMP instruction to the interrupt service routine.
Table 2-3 Bootstrap Mode Interrupt Vectors
Address
00C4
00C7
00CA
00CD
00D0
00D3
00D6
00D9
00DC
00DF
00E2
00E5
00E8
00EB
00EE
00F1
00F4
00F7
00FA
00FD
BF40
(Boot)
Vector
SCI
SPI
Pulse Accumulator Input Edge
Pulse Accumulator Overflow
Timer Overflow
Timer Output Compare 5
Timer Output Compare 4
Timer Output Compare 3
Timer Output Compare 2
Timer Output Compare 1
Timer Input Capture 3
Timer Input Capture 2
Timer Input Capture 1
Real Time Interrupt
IRQ
XIRQ
SWI
Illegal Opcode
COP Fail
Clock Monitor
Reset
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