參數(shù)資料
型號(hào)： MC68HC11A0CFB4
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： ROM-based high-performance microcontrollers
中文描述： 基于ROM的高性能微控制器
文件頁數(shù)： 112/124頁
文件大?。?/td> 840K
代理商： MC68HC11A0CFB4
ELECTRICAL CHARACTERISTICS
A-8
TECHNICAL DATA
NOTES:
1. Port C and D timing is valid for active drive (CWOM and DWOM bits not set in PIOC and SPCR registers respec-
tively).
2. All timing is shown with respect to 20% V
DD
and 70% V
DD
, unless otherwise noted.
Figure A-6 Port Write Timing Diagram
Figure A-7 Port Read Timing Diagram
Table A-5 Peripheral Port Timing
Characteristic
Symbol
1.0 MHz
Min
dc
1000
100
2.0 MHz
Min
dc
500
100
3.0 MHz
Min
dc
333
100
Unit
Max
1.0
—
—
Max
2.0
—
—
Max
3.0
—
—
Frequency of Operation (E-Clock Frequency)
E-Clock Period
Peripheral Data Setup Time
MCU Read of Ports A, B, C, and D
Peripheral Data Hold Time
MCU Read of Ports A, B, C, and D
Delay Time, Peripheral Data Write
f
o
MHz
ns
ns
t
cyc
t
PDSU
t
PDH
50
—
50
—
50
—
ns
MCU Write to Port A
MCU Writes to Ports B, C, and D
t
PWD
= 1/4 t
cyc
+ 150 ns
t
PWD
—
—
200
350
—
—
200
225
—
—
200
183
ns
ns
D3 PORT WRITE TIM
tPWD
E
MCU WRITE TO PORT
PREVIOUS PORT DATA
PREVIOUS PORT DATA
NEW DATA VALID
NEW DATA VALID
PORTS
B, C, D
PORT A
tPWD
tPDH
E
MCU READ OF PORT
tPDSU
PORTS
A, B, C, D
D3 PORT READ TIM
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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