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Timer Interface Module (TIM)
Advance Information
MC68HC(9)08XK48 — Rev. 4.0
254
Timer Interface Module (TIM)
MOTOROLA
Channels 2 and 3 can be linked to form a buffered output compare
channel whose output appears on the PTE6/TCH2 pin. The timer
channel registers of the linked pair alternately control the output.
Setting the MS2B bit in timer channel 2 status and control register
(TSC2) links channel 2 and channel 3. The output compare value in the
timer channel 2 registers initially controls the output on the PTE6/TCH2
pin. Writing to the timer channel 3 registers enables the timer channel 3
registers to synchronously control the output after the timer overflows. At
each subsequent overflow, the timer channel registers (2 or 3) that
control the output are the ones written to last. TSC2 controls and
monitors the buffered output compare function, and timer channel 3
status and control register (TSC3) is unused. In buffered output compare
operation, do not write new output compare values to the currently active
channel registers. Writing to the active channel registers is the same as
generating unbuffered output compares.
16.4.4 Pulse Width Modulation (PWM)
By using the toggle-on-overflow feature with an output compare channel,
the TIM can generate a PWM signal. The value in the timer counter
modulo registers determines the period of the PWM signal. The channel
pin toggles when the counter reaches the value in the timer counter
modulo registers. The time between overflows is the period of the PWM
signal.
As Figure 16-3 shows, the output compare value in the timer channel
registers determines the pulse width of the PWM signal. The time
between overflow and output compare is the pulse width. Program the
TIM to clear the channel pin on output compare if the state of the PWM
pulse is logic 1. Program the TIM to set the pin if the state of the PWM
pulse is logic 0.
The value in the timer counter modulo registers and the selected
prescaler output determine the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the timer counter modulo registers produces a PWM
period of 256 times the internal bus clock period.