參數(shù)資料
型號(hào)： MC68HC08QY2MDTE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16
封裝： 0.65 MM PITCH, LEAD FREE, TSSOP-16
文件頁數(shù)： 60/176頁
文件大?。?/td> 1124K
代理商： MC68HC08QY2MDTE
Electrical Specifications
MC68HC08QY/QT Family Data Sheet, Rev. 2
152
Freescale Semiconductor
Input low voltage
PTA0–PTA5, PTB0–PTB7
VIL
VSS
—
0.3 x VDD
V
Input hysteresis(3)
VHYS
0.06 x VDD
——
V
DC injection current(3) (4) (5) (6)
Single pin limit
Vin > VDD
Vin < VSS
Total MCU limit, includes sum of all stressed pins
Vin > VDD
Vin < VSS
IIC
0
—
2
–0.2
25
–5
mA
Ports Hi-Z leakage current
IIL
0—
±1
μA
Capacitance
Ports (as input)(3)
CIN
——
8
pF
POR rearm voltage
VPOR
750
—
mV
POR rise time ramp rate(3)(7)
RPOR
0.035
—
V/ms
Monitor mode entry voltage (3)
VTST
VDD + 2.5
—
VDD + 4.0
V
Pullup resistors(8)
PTA0–PTA5, PTB0–PTB7
RPU
16
26
36
k
Ω
Pulldown resistors(9)
PTA0–PTA5
RPD
16
26
36
k
Ω
Low-voltage inhibit reset, trip falling voltage
VTRIPF
1.80
1.95
2.10
V
Low-voltage inhibit reset, trip rising voltage(6)
VTRIPR
1.90
2.05
2.20
V
Low-voltage inhibit reset/recover hysteresis
VHYS
—100
—
mV
1. VDD = 2.7 to 3.3 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25C only.
3. Values are based on characterization results, not tested in production.
4. All functional non-supply pins are internally clamped to VSS and VDD.
5. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
6. Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If positive injection current (Vin > VDD) is greater than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum
injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is
present, or if clock rate is very low (which would reduce overall power consumption).
7. If minimum VDD is not reached before the internal POR reset is released, the LVI will hold the part in reset until minimum
VDD is reached.
8. RPU is measured at VDD = 3.0 V
9. RPD is measured at VDD = 3.0 V, Pulldown resistors only available when KBIx is enabled with KBIxPOL =1.
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
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