參數(shù)資料
型號(hào): MC68EC030
廠商: Motorola, Inc.
英文描述: Second-Generation 32-Bit Enhanced Embedded Controller
中文描述: 第二代32位增強(qiáng)型嵌入式控制器
文件頁數(shù): 6/36頁
文件大小: 392K
代理商: MC68EC030
6
MC68EC030 TECHNICAL DATA
Go to: www.freescale.com
MOTOROLA
31
15
16
0
31
0
31
15
16
0
7
8
15
0
31
0
31
0
31
0
2
(CCR)
A7'
(ISP)
SR
VBR
SFC
DFC
A7"
(MSP)
CACR
CAAR
INTERRUPT
STACK POINTER
MASTER
STACK POINTER
STATUS
REGISTER
VECTOR
BASE REGISTER
ALTERNATE FUNCTION
CODE REGISTERS
CACHE CONTROL
REGISTER
CACHE ADDRESS
REGISTER
31
0
31
0
AC0
AC1
ACCESS CONTROL
REGISTER 0
ACCESS CONTROL
REGISTER 1
15
0
ACUSR
ACU STATUS
REGISTER
Figure 4. Supervisor Programming Model Supplement
The status register (see Figure 5) contains the interrupt priority mask (three bits) as well as the following
condition codes: extend (X), negate (N), zero (Z), overflow (V), and carry (C). Additional control bits
indicate that the controller is in the trace mode (T1 or T0), supervisor/user state (S), and master/interrupt
state (M).
T
S
I
I
I
X
N
Z
V
C
2
1
0
15
13
10
8
4
0
INTERRUPT
PRIORITY MASK
SYSTEMBYTE
USER BYTE
CONDITION
CODES
1
14
0
0
0
0
T0
M
1
12
11
9
7
6
5
3
2
EXTEND
NEGATIVE
ZERO
OVERFLOW
CARRY
TRACE ENABLE
SUPERVISOR/USER STATE
MASTER/INTERRUPT STATE
Figure 5. Status Register
F
Freescale Semiconductor, Inc.
n
.
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