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Table of Contents
Paragraph
Title
Page
Number
MC68360 USER’S MANUAL
5.7
Instruction Execution Timing ................................................................. 5-82
5.7.1
Resource Scheduling ............................................................................ 5-83
5.7.1.1
Microsequencer..................................................................................... 5-83
5.7.1.2
Instruction Pipeline ................................................................................ 5-83
5.7.1.3
Bus Controller Resources ..................................................................... 5-83
5.7.1.3.1
Prefetch Controller ................................................................................ 5-84
5.7.1.3.2
Write-Pending Buffer ............................................................................. 5-84
5.7.1.3.3
Microbus Controller ............................................................................... 5-85
5.7.1.4
Instruction Execution Overlap ............................................................... 5-85
5.7.1.5
Effects of Wait States ............................................................................ 5-86
5.7.1.6
Instruction Execution Time Calculation ................................................. 5-86
5.7.1.7
Effects of Negative Tails........................................................................ 5-87
5.7.2
Instruction Timing Tables ...................................................................... 5-88
5.7.2.1
Fetch Effective Address ........................................................................ 5-90
5.7.2.2
Calculate Effective Address .................................................................. 5-91
5.7.2.3
MOVE Instruction .................................................................................. 5-92
5.7.2.4
Special-Purpose MOVE Instruction....................................................... 5-92
5.7.2.5
Arithmetic/Logic Instructions ................................................................. 5-93
5.7.2.6
Immediate Arithmetic/Logic Instructions................................................ 5-95
5.7.2.7
Binary-Coded Decimal and Extended Instructions................................ 5-95
5.7.2.8
Single Operand Instructions .................................................................. 5-96
5.7.2.9
Shift/Rotate Instructions ........................................................................ 5-96
5.7.2.10
Bit Manipulation Instructions ................................................................. 5-97
5.7.2.11
Conditional Branch Instructions............................................................. 5-98
5.7.2.12
Control Instructions ............................................................................... 5-99
5.7.2.13
Exception-Related Instructions and Operations .................................. 5-100
5.7.2.14
Save and Restore Operations ............................................................. 5-101
Section 6
System Integration Module (SIM60)
6.1
Module Overview..................................................................................... 6-1
6.2
Module Base Address Register (MBAR) ................................................. 6-3
6.3
System Configuration and Protection...................................................... 6-3
6.3.1
System Configuration .............................................................................. 6-5
6.3.1.1
SIM60 Interrupt Generation..................................................................... 6-6
6.3.1.2
Simultaneous SIM60 Interrupt Sources................................................... 6-8
6.3.1.2.1
Bus Monitor ............................................................................................. 6-8
6.3.1.2.2
Spurious Interrupt Monitor....................................................................... 6-8
6.3.1.2.3
Double Bus Fault Monitor........................................................................ 6-9
6.3.1.2.4
Software Watchdog Timer (SWT) ........................................................... 6-9
6.3.2
Periodic Interrupt Timer (PIT)................................................................ 6-10
6.3.2.1
PIT Period Calculation........................................................................... 6-10
6.3.2.2
Using the PIT as a Real-Time Clock ..................................................... 6-11
6.3.3
Freeze Support...................................................................................... 6-11
6.3.4
Low-Power Stop Support ...................................................................... 6-11
6.4
Low Power in Normal Operation ........................................................... 6-12
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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