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MOTOROLA
USER’S MANUAL
v
(Continued)
Paragraph
Title
Page
TABLE OF CONTENTS
5.2.4
Register Access ................................................................................ 5-3
5.2.5
Freeze Operation .............................................................................. 5-3
5.3
System Clock ............................................................................................ 5-4
5.3.1
Clock Sources ................................................................................... 5-4
5.3.2
Clock Synthesizer Operation ............................................................. 5-5
5.3.3
External Bus Clock .......................................................................... 5-12
5.3.4
Low-Power Operation ...................................................................... 5-12
5.4
System Protection ................................................................................... 5-14
5.4.1
Reset Status .................................................................................... 5-14
5.4.2
Bus Monitor ..................................................................................... 5-14
5.4.3
Halt Monitor ..................................................................................... 5-15
Spurious Interrupt Monitor ............................................................... 5-15
5.4.5
Software Watchdog ......................................................................... 5-15
5.4.6
Periodic Interrupt Timer ................................................................... 5-17
5.4.7
Interrupt Priority and Vectoring ........................................................ 5-18
5.4.8
Low-Power STOP Mode Operation ................................................. 5-19
5.5
External Bus Interface ............................................................................. 5-19
5.5.1
Bus Control Signals ......................................................................... 5-21
5.5.1.1
Address Bus ............................................................................ 5-21
5.5.1.2
Address Strobe ....................................................................... 5-21
5.5.1.3
Data Bus ................................................................................. 5-21
5.5.1.4
Data Strobe ............................................................................. 5-22
5.5.1.5
Read/Write Signal ................................................................... 5-22
5.5.1.6
Size Signals ............................................................................ 5-22
5.5.1.7
Function Codes ....................................................................... 5-22
5.5.1.8
Data and Size Acknowledge Signals ...................................... 5-23
5.5.1.9
Bus Error Signal ...................................................................... 5-23
5.5.1.10
Halt Signal ............................................................................... 5-23
5.5.1.11
Autovector Signal .................................................................... 5-24
5.5.2
Dynamic Bus Sizing ........................................................................ 5-24
5.5.3
Operand Alignment ......................................................................... 5-25
5.5.4
Misaligned Operands ...................................................................... 5-25
5.5.5
Operand Transfer Cases ................................................................. 5-26
5.6
Bus Operation ......................................................................................... 5-26
5.6.1
Synchronization to CLKOUT ........................................................... 5-26
5.6.2
Regular Bus Cycles ......................................................................... 5-27
5.6.2.1
Read Cycle .............................................................................. 5-28
5.6.2.2
Write Cycle .............................................................................. 5-29
5.6.3
Fast Termination Cycles .................................................................. 5-30
5.6.4
CPU Space Cycles .......................................................................... 5-30
5.6.4.1
Breakpoint Acknowledge Cycle ............................................... 5-31
336376UMBook Page v Friday, November 15, 1996 2:09 PM