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MC68331
USER’S MANUAL
REGISTER SUMMARY
MOTOROLA
D-13
D
D.3 System Integration Module
Table D-3
displays the SIM address map.
The column labeled “Access” indicates the
privilege level at which the CPU must be operating to access the register. A designa-
tion of “S” indicates that supervisor access is required. A designation of “S/U” indicates
that the register can be programmed to the desired privilege level.
Table D-3 SIM Address Map
Access
S
S
S
S
S
S
S
S
S/U
S/U
S/U
S
S/U
S/U
S/U
S
S
Address
$YFFA00
$YFFA02
$YFFA04
$YFFA06
$YFFA08
$YFFA0A
$YFFA0C
$YFFA0E
$YFFA10
$YFFA12
$YFFA14
$YFFA16
$YFFA18
$YFFA1A
$YFFA1C
$YFFA1E
$YFFA20
15
8 7
0
SIM CONFIGURATION (SIMCR)
FACTORY TEST (SIMTR)
CLOCK SYNTHESIZER CONTROL (SYNCR)
NOT USED
MODULE TEST E (SIMTRE)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
RESET STATUS REGISTER (RSR)
NOT USED
NOT USED
NOT USED
PORT E DATA (PORTE0)
PORT E DATA (PORTE1)
PORT E DATA DIRECTION (DDRE)
PORT E PIN ASSIGNMENT (PEPAR)
PORT F DATA (PORTF0)
PORT F DATA (PORTF1)
PORT F DATA DIRECTION (DDRF)
PORT F PIN ASSIGNMENT (PFPAR)
SYSTEM PROTECTION CONTROL
(SYPCR)
S
S
S
S
S
S
S
S
S
S
S
S
$YFFA22
$YFFA24
$YFFA26
$YFFA28
$YFFA2A
$YFFA2C
$YFFA2E
$YFFA30
$YFFA32
$YFFA34
$YFFA36
$YFFA38
$YFFA3A
$YFFA3C
$YFFA3E
$YFFA40
$YFFA42
$YFFA44
$YFFA46
$YFFA48
$YFFA4A
$YFFA4C
$YFFA4E
PERIODIC INTERRUPT CONTROL (PICR)
PERIODIC INTERRUPT TIMING (PITR)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
TEST MODULE MASTER SHIFT A (TSTMSRA)
TEST MODULE MASTER SHIFT B (TSTMSRB)
TEST MODULE SHIFT COUNT (TSTSC)
TEST MODULE REPETITION COUNTER (TSTRC)
TEST MODULE CONTROL (CREG)
TEST MODULE DISTRIBUTED REGISTER (DREG)
NOT USED
NOT USED
NOT USED
NOT USED
CHIP-SELECT PIN ASSIGNMENT (CSPAR0)
CHIP-SELECT PIN ASSIGNMENT (CSPAR1)
CHIP-SELECT BASE BOOT (CSBARBT)
CHIP-SELECT OPTION BOOT (CSORBT)
CHIP-SELECT BASE 0 (CSBAR0)
CHIP-SELECT OPTION 0 (CSOR0)
SOFTWARE SERVICE (SWSR)
NOT USED
NOT USED
NOT USED
NOT USED
S/U
NOT USED
NOT USED
S/U
PORT C DATA (PORTC)
NOT USED
S
S
S
S
S
S