
Dual Timer Module
MOTOROLA
MC68307 USER’S MANUAL
6-7
6.3.2 Software Watchdog Timer
The software watchdog timer module has an 8-bit prescaler that is not accessible to the
user, a read-only 16-bit watchdog counter register WCR, and a WRR.
6.3.2.1 WATCHDOG REFERENCE REGISTER (WRR). The WRR is a 16-bit register con-
taining the reference value for the watchdog timeout. The WRR appears as a memory-
mapped read-write register to the user.
Reset initializes the register to $FFFF, enabling the watchdog timer and setting it to the max-
imum timeout period. This causes a timeout to occur if there is an error in the boot program.
Reference Value
This 15-bit field should be written with the limit value for the corresponding WCR count
bits. It is 15-bits wide because the least-significant bit of the WCR is not compared.
EN — Enable Watchdog
1 = The watchdog timer is enabled, software should periodically write to the WCR lo-
cation, so that the counter never reaches the above reference value.
0 = The watchdog timer is disabled, and does not count.
6.3.2.2 WATCHDOG COUNTER REGISTER (WCR). The WCR is a 16-bit up-counter,
appears as a memory-mapped register and may be read at any time. Clearing EN in the
WRR causes the counter to be reset and disables the count operation.
A read cycle to WCR causes the current value of the watchdog timer to be read. Reading
the watchdog timer does not affect the counting operation.
A write cycle to WCR causes the counter and prescaler to be reset. A write cycle should be
executed on a regular basis so that the watchdog timer is never allowed to reach the refer-
ence value during normal program operation.
WRR
MBASE+$12A
15
0
15-Bit Reference Value REF(15–1)
EN
RESET:
1
Read/Write
Supervisor or User
WCR
MBASE+$12C
15
0
16-Bit Counter Value COUNT(15–0)
RESET:
1
Read/Write
Supervisor or User