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參數(shù)資料
| 型號： | MC56F8347VPY60 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-BIT, 120 MHz, OTHER DSP, PQFP160 |
| 封裝： | LQFP-160 |
| 文件頁數(shù)： | 64/160頁 |
| 文件大小： | 2217K |
| 代理商： | MC56F8347VPY60 |
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156
56F8347 Technical Data
Preliminary
The thermal characterization parameter is measured per JESD51-2 specification using a 40-gauge
type T thermocouple epoxied to the top center of the package case. The thermocouple should be
positioned so that the thermocouple junction rests on the package. A small amount of epoxy is
placed over the thermocouple junction and over about 1mm of wire extending from the junction.
The thermocouple wire is placed flat against the package case to avoid measurement errors caused
by cooling effects of the thermocouple wire.
When heat sink is used, the junction temperature is determined from a thermocouple inserted at the
interface between the case of the package and the interface material. A clearance slot or hole is
normally required in the heat sink. Minimizing the size of the clearance is important to minimize
the change in thermal performance caused by removing part of the thermal interface to the heat
sink. Because of the experimental difficulties with this technique, many engineers measure the heat
sink temperature and then back-calculate the case temperature using a separate measurement of the
thermal resistance of the interface. From this case temperature, the junction temperature is
determined from the junction-to-case thermal resistance.
12.2 Electrical Design Considerations
Use the following list of considerations to assure correct device operation:
Provide a low-impedance path from the board power supply to each VDD pin on the device, and
from the board ground to each VSS (GND) pin
The minimum bypass requirement is to place six 0.01–0.1
F capacitors positioned as close as
possible to the package supply pins. The recommended bypass configuration is to place one bypass
capacitor on each of the VDD/VSS pairs, including VDDA/VSSA. Ceramic and tantalum capacitors
tend to provide better performance tolerances.
Ensure that capacitor leads and associated printed circuit traces that connect to the chip VDD and
VSS (GND) pins are less than 0.5 inch per capacitor lead
Use at least a four-layer Printed Circuit Board (PCB) with two inner layers for VDD and VSS
Bypass the VDD and VSS layers of the PCB with approximately 100F, preferably with a high-grade
capacitor such as a tantalum capacitor
Because the 56F8347’s output signals have fast rise and fall times, PCB trace lengths should be
minimal
CAUTION
This device contains protective circuitry to guard
against damage due to high static voltage or electrical
fields. However, normal precautions are advised to
avoid
application
of
any
voltages
higher
than
maximum-rated voltages to this high-impedance circuit.
Reliability of operation is enhanced if unused inputs are
tied to an appropriate voltage level.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8347VPYE | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| MC56F8347VVF | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| MC56F8347VVFE | 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:56F8xxx 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285 |
| MC56F8355 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-Bit Digital Signal Controllers |
| MC56F8355MFG60 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Hybrid Controllers |
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