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參數(shù)資料
| 型號： | MC54-74HC240A |
| 廠商： | Motorola, Inc. |
| 英文描述： | Octal 3-State Inverting Buffer/Line Driver/Line Receiver |
| 中文描述： | 八路三態(tài)反向緩沖器/線路驅(qū)動器/線接收器 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 168K |
| 代理商： | MC54-74HC240A |
MC54/74HC240A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
(Voltages Referenced to GND)
0.1
0.1
25 C
6.0
|Iout|
20
μ
A
Voltage
Unit
V
0.1
125 C
0.1
85 C
0.1
V
Test Conditions
Vin = VIL
Parameter
Symbol
Maximum Low–Level Output
Vin = VIL or VIH
Vin = VCC or GND
Iout = 0
μ
A
2.4 mA
2.0
0.1
|Iout|
3.0
4.5
0.26
0.26
±
5.0
0.33
0.33
0.4
0.4
Current (per Package)
Current
Maximum Quiescent Supply
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Symbol
b l
Parameter
V
25 C
U i
6.0
6.0
6.0
14
19
125 C
20
28
28
tPHL
(Figures 1 and 3)
3.0
19
40
50
17
60
tPHZ
(Figures 2 and 4)
3.0
10
60
70
24
165
80
ns
Maximum Propagation Delay, Output Enable to YA or YB
2.0
60
110
140
24
165
ns
Maximum Output Transition Time, Any Output
2.0
6.0
75
13
90
15
ns
Cin
Cout
Maximum Input Capacitance
—
—
10
10
10
pF
Maximum Three–State Output Capacitance (Output in
15
15
15
pF
CPD
Power Dissipation Capacitance (Per Transceiver Channel)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
32
pF
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