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參數(shù)資料
| 型號(hào)： | MC54-74HC175 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Quad D Flip-Flop with Common Clock and Reset |
| 中文描述： | 四D觸發(fā)器與普通時(shí)鐘和復(fù)位拖鞋 |
| 文件頁(yè)數(shù)： | 4/7頁(yè) |
| 文件大?。?/td> | 200K |
| 代理商： | MC54-74HC175 |
MC54/74HC175
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
4
SWITCHING WAVEFORMS
Figure 1.
Figure 2.
50%
50%
50%
50%
VCC
VCC
GND
GND
RESET
Q
Q
CLOCK
tPLH
tPHL
50%
DATA
CLOCK
VCC
VCC
GND
Figure 3.
GND
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4.
1/fmax
CLOCK
Q or Q
tf
tr
VCC
GND
90%
50%
10%
90%
50%
10%
tPLH
tPHL
tTLH
tTHL
tw
tw
trec
VALID
th
tsu
TEST CIRCUIT
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| MC74HC175D | Quad D Flip-Flop with Common Clock and Reset |
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| MC54-74HC240A | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Octal 3-State Inverting Buffer/Line Driver/Line Receiver |
| MC54-74HC244A | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Octal 3-State Noninverting Buffer/Line Driver/Line Receiver |
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| MC54-74HC251 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Input Data Selector/Multiplexer with 3-State Outputs |
| MC54-74HC259 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:8-Bit Addressable Latch 1-of-8 Decoder |
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