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參數(shù)資料
型號(hào)： MC44BS373CAEFR2
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 24/52頁(yè)
文件大?。?/td> 0K
描述： IC AUD/VID PAL MODULATOR 16-SOIC
標(biāo)準(zhǔn)包裝： 1
類型： NTSC/PAL 調(diào)制器
應(yīng)用： 音頻/視頻，VCR，機(jī)頂盒
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC N
包裝： 剪切帶 (CT)
其它名稱： MC44BS373CAEFR2CT
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
The bus receiver operates the I2C-compatible data format. The chip address (I2C bus) is shown in Table 30.
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45 ) is an acknowledge bit (ACK) during which
the MCU sends a logic 1 and the modulator circuit answers on the data line by pulling it low. Besides the
chip address, the circuit needs 2 or 4 data bytes for operation. The sequences of data bytes shown in Table 31
are the permitted incoming information.
After the chip address (CA), 2 or 4 data bytes may be received.
If 3 data bytes are received, the third one is ignored.
If 5 or more data bytes are received, the fifth and following ones are ignored, and the last ACK pulse
is sent at the end of the fourth data byte.
The first and third data bytes contain a function bit, which lets the IC distinguish between frequency
information and control information. If the function bit is a logic 1, the two following bytes contain control
information. The first data byte after the chip address may be byte CO or byte FM. The 2 bytes of frequency
information are preceded by a logic 0.
16.6 I2C Read Mode Format
The chip address (I2C bus) is shown in Table 32.
The incoming information consists of the read-mode chip address byte. The device then answers with an
ACK followed by 1 byte containing 3 bits of status information. No acknowledge is answered by the
modulator after this byte.
Table 30. Chip Address (I2C Write Mode)
1 1001 000 (ACK)=0xC8 in write mode
1 1001 010 (ACK)=0xCA in write mode
1 1001 100 (ACK)= 0xCC in write mode
1 1 0 0 1 1 1 0 (ACK) = 0xCE in write mode
Table 31. Permitted Data Bytes (Incoming Information)
Example 1
STA
CA
C1
C0
STO
Example 2
STA
CA
FM
FL
STO
Example 3
STA
CA
C1
C0
FM
FL
STO
Example 4
STA
CA
FM
FL
C1
C0
STO
Notes:
STA = Start condition
FM = Frequency information, high order bits
C1 = Control information, high order bits
STO = Stop condition
CA = Chip Address
FL = Frequency information, low order bits
CO = Control information, low order bits
Table 32. Chip Address (I2C Read Mode)
1 1 001001 (ACK)=0xC9 (hex) in read mode
1 1 00101 1 (ACK) = 0xCB (hex) in read mode
1 1 0 0 1 1 0 1 (ACK) = 0xCD (hex) in read mode
1 1 0 0 1 1 1 1 (ACK) = 0xCF (hex) in read mode
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