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      參數(shù)資料
      型號: MC44462B
      廠商: MOTOROLA INC
      元件分類: 畫面疊加
      英文描述: Y-C PICTURE-IN-PICTURE (PIP) CONTROLLER
      中文描述: PICTURE-IN-PICTURE IC, PDIP56
      封裝: SHRINK, PLASTIC, DIP-56
      文件頁數(shù): 1/7頁
      文件大?。?/td> 183K
      代理商: MC44462B
      SEMICONDUCTOR
      TECHNICAL DATA
      Y–C PICTURE–IN–PICTURE
      (PIP) CONTROLLER
      B SUFFIX
      PLASTIC PACKAGE
      CASE 859
      (SDIP)
      56
      1
      Order this document from Analog Marketing
      Device
      Operating
      Temperature Range
      Package
      ORDERING INFORMATION
      MC44462B
      TJ = –65
      °
      to +150
      °
      C
      SDIP
      right to change or discontinue this product without notice.
      The MC44462 Y–C PIP controller is a low cost member of a family of high
      performance PIP controllers and video signal processors for television. It is a
      follow–up to the MC44461 PIP and has a modified input selection to allow
      higher performance in TV systems which have S–Video inputs on the back
      panel. The S–Video input is separate luma (luminance) and chroma
      components. It is NTSC compatible and contains all the analog signal
      processing, control logic and memory necessary to provide for the overlay of
      a small picture from a second non synchronized source onto the main picture
      of a television. All control and setup of the MC44462 is via a standard two pin
      I2C bus interface. The device is fabricated using BICMOS technology. It is
      available in a 56–pin shrink dip (SDIP) package.
      The main features of the MC44462 are:
      Switchable PIP Composite Video Signals – Video 1 and Video 2
      S–Video Output Allows High Performance in TV
      Two PIP Sizes; 1/16 and 1/9 Screen Area
      Freeze Field Feature
      Variable PIP Position in 64–X by 64–Y Steps
      PIP Border with Programmable Color
      Programmable PIP Tint and Saturation Control
      Automatic Main to PIP Contrast Balance
      Vertical Filter
      Integrated 64 k Bit DRAM Memory Resulting in Minimal RFI
      Minimal RFI Allows Simple Low Cost Application into TV
      I2C Bus Control – No External Variable Adjustments Needed
      Operates from a Single 5.0 V Supply
      Economical 56–Pin Shrink DIP Package
      YC–PIP System Diagram
      Video
      Processor
      Yin
      Cin
      CV
      Main
      (unused)
      Ymain out
      Cmain out
      CV1
      CV2
      YC PIP
      MC44462
      Ymain in
      Cmain in
      S
      W
      M
      T
      R
      X
      Y
      C
      Comb
      Filter
      (MC141625)
      IIC
      IIC
      CV
      Tuner/IF
      Cable
      Y
      C
      CV
      Back Panel
      S–VHS Inputs
      Back Panel
      Composite
      Video Input
      R
      G
      B
      This document contains information on a product under development. Motorola reserves the
      Motorola, Inc. 1996
      Issue 2
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      參數(shù)描述
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