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參數(shù)資料
| 型號(hào)： | MC33993DWBR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH I/O INTERFACE 32-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 32-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 32-SOIC |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
17
33993
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
ARCHIVE
INFORMATION
ARCHIVE
INFORMATION
EXAMPLE OF NORMAL MODE OPERATION
The operation of the device in Normal Mode is defined by
the states of the programmable internal control registers. A
typical application may have the following settings:
Programmable Switch – Set to Switch-to-Ground
All Inputs Set as Wake-Up
Wetting Current On (16 mA)
Wetting Current Timer On (20 ms)
All inputs Tri-State-Disabled (comparator is active)
Analog select 00000 (no input channel selected)
With the device programmed as above, an interrupt will be
generated with each switch contact change of state (open-to-
close or close-to-open) and 16 mA of contact wetting current
will be source for 20 ms. The INT pin will remain low until
switch status is acknowledged by the microprocessor. It is
critical to understand INT will not be cleared on the rising
edge of CS if a switch closure occurs while CS is low. The
maximum duration a switch state change can exist without
acknowledgement depends on the software response time to
the interrupt. Figure 4, page 8, shows the interaction
between changing input states and the INT and CS pins.
If desired the user may disable interrupts (wake up/
interrupt command) from the 33993 device and read the
switch states on a periodic basis. Switch activation and
deactivation faster than the MCU read rate will not be
acknowledged.
The 33993 device will exit the Normal mode and enter the
Sleep mode only with a valid sleep command.
SLEEP MODE
Sleep mode is used to reduce system quiescent currents.
Sleep mode may be entered only by sending the sleep
command. All register settings programmed in Normal mode
will be maintained in Sleep mode.
The 33993 will exit Sleep mode and enter Normal mode
when any of the following events occur:
Input Switch Change of State (when enabled)
Interrupt Timer Expire
Falling Edge of WAKE
Falling Edge of INT (with VDD = 5.0 V and WAKE at
Logic [1])
Falling Edge of CS (with VDD = 5.0 V)
Power-ON Reset (POR)
The VDD supply may be removed from the device during
Sleep mode. However removing VDD from the device in
Sleep mode will disable a wake-up from falling edge of INT
and CS.
Note In cases where CS is used to wake the device, the
first SO data message is not valid.
The sleep command contains settings for two
programmable timers for Sleep mode, the interrupt timer and
the scan timer, as shown in Table 17.
The interrupt timer is used as a periodic wake-up timer.
When the timer expires, an interrupt is generated and the
device enters Normal mode. Table 18 shows the
programmable settings of the Interrupt timer.
Table 15. Serial Output (SO) Bit Data
Type of Input
Input
Programmed
Voltage on
Input Pin
SO SPI Bit
SP
Switch to
Ground
SPn < 4.0 V
1
Switch to
Ground
SPn > 4.0 V
0
Switch to
Battery
SPn < 4.0 V
0
Switch to
Battery
SPn > 4.0 V
1
SG
N/A
SGn < 4.0 V
1
N/A
SGn > 4.0 V
0
Table 15. Serial Output (SO) Bit Data
Type of Input
Input
Programmed
Voltage on
Input Pin
SO SPI Bit
Table 16. Serial Output (SO) Response Register
SO Response Will
Always Send
them
flg
int
flg
SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
SG1
3
SG1
2
SG1
1
SG1
0
SG9 SG8 SG7 SG6 SG5 SG4 SG3 SG2 SG1 SG0
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