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參數(shù)資料
| 型號： | MC33888FBR2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Quad High-Side and Octal Low-Side Switch for Automotive |
| 中文描述： | 40 A BUF OR INV BASED PRPHL DRVR, PQFP64 |
| 封裝： | 0.65 MM PITCH, MO-188, POWER PACK-64 |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 667K |
| 代理商： | MC33888FBR2 |
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33888
24
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Default Mode
The default mode describes the state of the device after first
applying V
PWR
voltage or a reset transition from logic [0] to
logic [1] prior to SPI communication. In the default mode, all
outputs will be off (assuming that the direct inputs ILS and
IHS[0:3] and the WAKE terminal are at logic [0]). All of the
specific terminal functions will operate as though all of the
addressable configuration register bits were set to logic [0]. This
means, for example, that all of the low-side outputs will be
controllable by the ILS terminal, and that all high-side outputs
will be controllable via their respective IHS terminals. During the
default mode, all high-side drivers will default with open load
detection enabled. All low-side drivers will default with open
load detection disabled. This mode allows limited control of the
33888 with the direct inputs in the absence of a
n
SPI.
Returning the device to the default state after a period of
normal operation, followed by the removal of the V
PWR
voltage,
requires that the
RST
input be held at a logic [0] state until V
PWR
falls to a level below 2.0 V. If the
RST
and V
DD
input levels are
normal, then failure to allow V
PWR
to fall below 2.0 V will result
in an internal bias circuit clamping the V
PWR
terminal to
approximately 3.5 V. Once V
PWR
falls below 2.0 V, the
RST
can
be returned to 5.0 V without re-enabling the bias circuit.
Fault Logic Requirements
The 33888 indicates all of the following faults as they occur:
Overtemperature Fault
Overvoltage Fault
Open Load Fault
Overcurrent Fault
With the exception of the overvoltage, these faults are output
specific. The overvoltage fault is a global fault. The overcurrent
fault is only reported for the low-side outputs.
The 33888 low-side outputs incorporate an internal fault
filter, t
DLY(
FS
)
. The fault timer filters noise and switching
transients for overcurrent faults when the output is ON and
open load faults when the output is OFF. All faults are latched
and indicated by a logic [1] for each output in the 33888 status
word (
Table 4
, page 23). If the fault is removed, the status bit for
the faulted output will be cleared by a rising edge on
CS
.
The
FS
terminal is driven to a logic [0] when a fault exists on
any of the outputs.
FS
provides real time monitoring of the
overvoltage fault. For the high-side outputs,
FS
provides real
time monitoring of the open load and overtemperature. For the
low-side outputs, the
FS
is latched to a logic [0] for open load,
overtemperature, and overcurrent faults. The latch is cleared by
toggling the state of the faulted output or by bringing
RST
low.
Overtemperature Fault
The 33888 incorporates overtemperature detection and
shutdown circuitry into each individual output structure.
Overtemperature detection occurs when an output is in the ON
state. When an output is shut down due to an overtemperature
condition, no other output is affected. The output experiencing
the fault is shut down to protect itself from damage. A fault bit is
loaded into the status register if the overtemperature condition
is removed, and the fault bit is cleared upon the rising edge of
CS
.
For the low-side outputs, the faulted output is latched OFF
during an overtemperature condition. If the temperature falls
below the recovery level, T
LIM(HYS)
, then the output can be
turned back ON only after the output has first been commanded
OFF either through the SPI or the ILS, depending on the logic
configuration.
For the high-side output(s), an overtemperature condition will
result in the output(s) turning OFF until the temperature falls
below the T
LIM(HYS)
. This cycle will continue indefinitely until
action is taken by the MCU to shut the output(s) OFF.
Overvoltage Fault
The 33888 shuts down all outputs during an overvoltage
condition on the V
PWR
terminal. The outputs remain in the OFF
state until the overvoltage condition is removed. Fault status for
all outputs is latched into the status register. Following an
overvoltage condition, the next write cycle sent by the SO
terminal of the 33888 is logic [1] on OD11:OD0, indicating all
outputs have shut down. If the overvoltage condition is
removed, the status register can be cleared by a rising edge on
CS
.
Open Load Fault
The 33888 incorporates open load detection circuitry on
every output. A high-side or low-side output open load fault is
detected and reported as a fault condition when the
corresponding output is disabled (OFF) if it was configured for
open load detection by setting the appropriate bit to logic [0]
(HS3:HS0) or logic [1] (LS11:LS4) in the OLFCR register
(
Figure 6
, page 25).
The high-side open load fault is detected and latched into the
status register after the internal gate voltage is pulled low
enough to turn off the output. If the open load fault is removed
or if the faulted output is commanded ON, the status register
can be cleared by a rising edge on
CS
. Note that the device
default state will enable the high-side open load detection and
disable the low-side open load detection circuits, respectively.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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