參數(shù)資料
型號(hào): MC33689DWBR2
廠(chǎng)商: Freescale Semiconductor
文件頁(yè)數(shù): 11/31頁(yè)
文件大?。?/td> 0K
描述: IC SYSTEM BASE W/LIN 32-SOIC
標(biāo)準(zhǔn)包裝: 1,000
應(yīng)用: 自動(dòng)鏡像控制
接口: SPI
電源電壓: 5.5 V ~ 18 V
封裝/外殼: 32-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 32-SOIC
包裝: 帶卷 (TR)
安裝類(lèi)型: 表面貼裝
配用: KIT33689DWBEVB-ND - KIT FOR 33689 SBC WITH LIN
Analog Integrated Circuit Device Data
Freescale Semiconductor
19
33689
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
A System Basis Chip (SBC) is a monolithic IC combining
many functions found in standard microcontroller-based
systems; e.g., power management, communication interface,
system protection, and diagnostics.
The 33689 is a SPI-controlled SBC combining many
functions with a LIN transceiver for slave node applications.
The 33689 has a 5.0 V, 50 mA regulator with undervoltage
reset, output current limiting, overtemperature pre-warning,
and thermal shutdown. An externally selectable timing
Window Watchdog is also included.
The LIN transceiver has waveshaping that can be disabled
when high data rates are warranted. A single 50 mA and two
150 mA fully protected high-side switches with output
clamping are available for switching inductive or resistive
loads. The 150 mA switches are PWM capable.
Two high-voltage inputs can be used to monitor switches
or provide external wake-up. An internal current sense
operational amplifier is available for load current monitoring.
FUNCTIONAL PIN DESCRIPTION
LEVEL 1 AND LEVEL 2 INPUT PINS
(L1 AND L2)
These pins are used to sense external switches and to
wake up the 33689 from Sleep or Stop mode. During Normal
mode, the state of these pins can be read through the SPI
Register. (Refer to the section entitled SPI Interface and
Register Description on page 24 for information on the SPI
Register.)
HIGH-SIDE DRIVER OUTPUT PINS 1 AND 2 (HS1
AND HS2)
These two high-side switches are able to drive loads such
as relays or lamps. They are protected against overcurrent
and overtemperature and include internal clamp circuitry for
inductive load protection. Switch control is done through
selecting the correct bit in the SPI Register. HS1 and HS2
can be PWM-ed if required through the IN input pin. The
internal circuitry that drives both high-side switches is an
AND function between the SPI bit HS1 (or HS2) and the IN
input pin.
If no PWM control is required, the IN pin must be
connected to the VDD pin.
HIGH-SIDE DRIVER OUTPUT PIN 3 (HS3)
This high-side switch can be used to drive small lamps,
Hall sensors, or switch pullup resistors. Control is done
through the SPI Register only.
No direct PWM control is possible on this pin.
This high-side switch features current limit to protect it
against overcurrent and short circuit conditions. It is also
protected against overtemperature.
VOLTAGE SUPPLY PINS 1 AND 2
(VS1 AND VS2)
The 33689 is supplied from a battery line or other supply
source through the VS1 and VS2 pins. An external diode is
required to protect against negative transients and reverse
battery. The 33689 can operate from 4.5 V and under the
jump start condition at 27 V DC. Device functionality is
guaranteed down to 4.5 V at VS1 and VS2 pins. These pins
sustain standard automotive voltage conditions such as load
dump at 40 V.
LIN BUS PIN (LIN)
The LIN pin represents the single-wire bus transmitter and
receiver. It is suited for automotive bus systems and is based
on the LIN bus specification.
VOLTAGE SOURCE PIN (VDD)
The VDD pin is the 5.0 V supply pin for the MCU and the
current sense operational amplifier.
CURRENT SENSE OPERATIONAL AMPLIFIER
PINS (E+, E
-, VCC, AND OUT)
These are the pins of the single-supply current sense
operational amplifier.
The E+ and the E- input pins are the non-inverting and
inverting inputs of the current sense operational amplifier,
respectively.
The OUT pin is the output pin of the current sense
operational amplifier.
The VCC pin is the +5.0 V single-supply connection for the
current sense operational amplifier.
The current sense operational amplifier is enabled in
Normal mode only.
WATCHDOG CONFIGURATION PIN (WDC)
The WDC pin is the configuration pin for the internal
watchdog. A resistor is connected to this pin. The resistor
value defines the watchdog period. If the pin is left open, the
watchdog period is fixed to its default value (150 ms typical).
If no watchdog function is required, the WDC pin must be
connected to GND.
相關(guān)PDF資料
PDF描述
83-1R UHF RECEPTACLE,SQUARE FLANGE
VE-B04-IX-F2 CONVERTER MOD DC/DC 48V 75W
VE-B04-IX-F1 CONVERTER MOD DC/DC 48V 75W
MC33742DW IC SYSTEM BASE W/LIN 28-SOIC
MC33742DWR2 IC SYSTEM BASE W/LIN 28-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC33690DWE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC STAND ALONE TAG READER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線(xiàn)寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC33690DWER2 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC STAND ALONE TAG READER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線(xiàn)寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC33696FCAE 功能描述:射頻收發(fā)器 UHF TRANSCEIVER RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類(lèi)型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類(lèi)型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
MC33696FCAER2 功能描述:射頻收發(fā)器 UHF TRANSCEIVER ECHO RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類(lèi)型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類(lèi)型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
MC33696FCE 功能描述:射頻收發(fā)器 PLL Tuned UHF Recvr RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類(lèi)型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類(lèi)型:SPI 封裝 / 箱體:QFN-32 封裝:Tray